Best App Notes/Support Docs for Taking Advantage of Ultralow Power Features

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Best App Notes/Support Docs for Taking Advantage of Ultralow Power Features

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PG1
Contributor I

Hi. I am just starting a new design with MC9S08LL36 (it will be the -64 after marketing dept feature  creep). The entire design feasibility was evaluated using freescales battery life tool.

 

Can anyone suggest good app notes docs or presentations  which can bring me up speed faster on using the low power features for a battery operated design using less than 0.8mA on average?

 

I would be also interested in learning about any limitations with the  BDM in the deeper sleep modes.

 

As I find stuff on my own, I will keep this thread updated.

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PG1
Contributor I
1. Peripheral clock gating- cut off clock to unused peripherals in acordance with instructions in reference manual- Do not cut off clock until peripheral has been put in desired state. 2. All parallel i/o- ensure logic state is valid 1 or valid 0 using internal or external pullups or output direction. Even though certain pins are not available on 54 pin packages, they still exist on the chip, so these must be initialized as well.
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Mickey
Contributor III

Interrupt wake-up function is good use of energy focus.

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PG1
Contributor I

Here's the stuff I found on the freescale site

 

-The schematics of all the demo boards are useful.

-AN3460 and AN990 are good to review

-Freescale Continuum Magazine Low Power Edition

-FTF-IND-F0749 Handson Workshop PDF

-Low Power Seminar PPT PDF

-S08LL16PWRCMPWP.pdf LL16 white paper

-HCS08 Low Voltage Low Power Features on demand training.

-LL16demo and TWR-S08-LL64 code, notes, apps.

 

The biggest surprise I found was that the on-chip LVD needs 75uA whereas an external 10 cent fixed 1.8V LVD chip with open-drain uses <1uA.

 

To really get the best performance you have to read the manual and understand the pro's and con's of the all the different power modes in the LL36/64

 

 

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