9S08 Keyboard Interrupts

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9S08 Keyboard Interrupts

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jtjans
Contributor I
I can't find this in any of the documentation for the 9S08 family.  Using a KBI, configured for falling edge only interrupt.  If an edge occurs while the interrupt mask is set, and then the mask is cleared with a CLI instruction, will the KBI be recognized or did I miss it?
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jtjans
Contributor I
I am using the 9S08GB32 in the curent app.  I am using a few different versions depending on the application.  I am using a single KBI to wake up on an incoming pulse but the interrupts may be temporarily disabled when the pulse arrives due to an IRQ interrupt, and I don't want to miss the pulse.   Thanks for the helpful responses. 
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peg
Senior Contributor IV
Hi,
You won't miss it.
The fact that it has occurred is latched and the interrupt will occur when they are re-enabled.
Regards
David
 
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jah
Contributor I
consider the mc9s08rd32dwe and reference the documentation:
http://www.freescale.com/files/microcontrollers/doc/data_sheet/MC9S08RG60.pdf

there are 2 kbi channels on this part, kbi1sc functional over 8bits on portA and can be edge andor level. the second is kbi2sc and is a 4bit operating on another port.

more generic documentation:
http://www.freescale.com/files/microcontrollers/doc/ref_manual/HCS08RMV1.pdf?srch=1

please be more specific on which part you are using and if multiple channls which chan. even on the above parts, i bet the operation varries somewhat between channels too. so we can help.

note:
are you using the kbi with a keyboard matrix? if so missing a keypress is no big bad since it is a slow operation, lots of contact bounce and if all fails most operators are well trained by microsoft to just try again. if you are looking for another external interrupt consider setting one channel of a tpm port to Input Capture Mode. method see previous posting.
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rocco
Senior Contributor II
Hi, jtjans:

Setting the CPU's interrupt mask will never cause you to loose an interrupt on any of the HC08/S08 peripherals. It will prevent the CPU from servicing the interrupt, but the interrupt flag within the peripheral will remain set until it is cleared by software.

Hope that helps . . .
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peg
Senior Contributor IV
Hi,
I feel I must qualify Rocco's very marketing like speak statement by adding that only 1 event can occur while the interrupts are masked or you will indeed lose events.
 
Never say never!
 
Regards David
 
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rocco
Senior Contributor II

peg wrote:
I feel I must qualify Rocco's very marketing like speak statement by adding that only 1 event can occur while the interrupts are masked or you will indeed lose events.
Yes, very true. I was speaking too generally. I need to wash the marketing out of my brain.

To rephrase: You will not loose the interrupt, but that single interrupt may represent multiple events. The ISR needs to accommodate that possibility.
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