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Re: SPI chip select for multi-byte transactions on mx6sl with 3.0.35
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Big gap between SDMA writes on EIM bus on 6sl/Linux 4.1
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Appropriate way to setup MR3 for 6SL with LPDDR2
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Re: Where is MR3/ZQ calibration set up for mx6sl in u-boot or kernel?
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Re: Where is MR3/ZQ calibration set up for mx6sl in u-boot or kernel?
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Re: Selecting ZQPAD and ZQ resistor value for i.mx6SL and LPDDR2
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Re: Where is MR3/ZQ calibration set up for mx6sl in u-boot or kernel?
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Where is MR3/ZQ calibration set up for mx6sl in u-boot or kernel?
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Selecting ZQPAD and ZQ resistor value for i.mx6SL and LPDDR2
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Re: Bit flip errors on 6sl board with LPDDR2 memory
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09-26-2017
04:19 AM
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Re: Setting EIM clock on 7D
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Re: Setting EIM clock on 7D
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