programming addresses bigger then 24bit in nor flash with flexSPI

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programming addresses bigger then 24bit in nor flash with flexSPI

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adi2Intel
Contributor III

Hi all!

I am using my modified SDK example of the flexSPI_nor_polling_transfer example code.

I am trying to program an external 32MB flash chip.

I have changed the flash size definition in the code:

adi2Intel_0-1672952591427.png

 

I noticed that when I reach the address 0x100 0000 and above I actually reach address 0x0.
I think I cannot program or read addresses bigger then 24bit

how can I fix this ?

 

thanks

Adi

Intel

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tkroeger
Contributor II

NXP never ever fully answers this repeated question on this forum. When NXP? When?

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adi2Intel
Contributor III

I have add this to LUT:

adi2Intel_0-1673357928498.png

and with the function:

adi2Intel_1-1673357984940.png

 

but its not effective

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lucas_cao
NXP Employee
NXP Employee

Hi 

From my point of view, 32MB should be accessed

For your question, i  have an idea here.

I supposed you are using 3BYTE address mode, but for the address bigger than 3BYTE(bingger than 0x100 0000), you cannot get the correct data. So i thinks you should use 4BYTE address mode access the space bigger than 0x100 0000.

You can read the flash datasheet to know how to use 4BYTE mode and update the LUT in RT device.

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adi2Intel
Contributor III

this is from the data sheet:

adi2Intel_0-1673337379180.png

 

if i only need to add values to the LUT table, which should I add?

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jingpan
NXP TechSupport
NXP TechSupport

Hi @adi2Intel ,

Please refer to the Look Up Table section in reference manual. The bit number is the operand value in instruction code. For example,

// Read LUTs
[0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
[1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),

 

Regards,

Jing

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SpoonMan
Contributor IV

@adi2Intel could you please let us know if changing that 0x18 (24) to 0x20 (32) in the LUT is sufficient to make W25Q256FV flash to work? I suspect the answer is NO because according to 6.1.5 in datasheet, to operate in 4-bytes addressing mode ADP bit in Status Register must be set, but factory default value for it is 0.

Please also pay attention to what you wrote in the LUT, according to the datasheet 0xE9 command is EXIT 4-byte addressing mode, not ENTER.

SpoonMan_0-1675172504372.png

Let us know, please. Thanks!

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