Problems getting RT1176 to run on custom board

[mrd]

Hi. We have a custom RT1176 based design where the processor does not run. Please provide troubleshooting advice. We have tried to follow MIMRT1170HDUG (Hardware Development Guide for the MIMXRT1170 Processor). To bring up the board we are using the LED Blinky code from the SDK examples.

The RT1176 circuit and related parts like SDRAM and serial flash are the same as on the RT1170-EVK board. We just eliminated a few things that we didn't need and changed I2C, SPI, and GPIO usage, but kept basic RT1176, SDRAM, QSPI Flash, and uSD card connections the same as on the EVK. We even replicated the EVK's power-supplies and layout for SDRAM, serial Flash, and uSD card connections. Our custom board has the industrial version of the RT1170 (MIMXRT1176CVM8A) instead of the commerical version used on the EVK. We slowed M7 core clock speed to 792MHZ. We are currently not using the M4 core.

Note that we do have several of the RT1176-EVK boards running that we have used for reference and development.

On our custom board, we have tried Serial Downloader boot mode via USB1 connection, but the PC running MCUBootUtility does not see the USB connection. I.e., The usual VendorID/ProductID of 1FC9/013D is not found. We are going to try UART connection next.

We have also attempted to load the program into QSPI Flash via Segger J-Link. The SW-IP with ID 0x6BA02477 is found. It also finds CPUID 0x411FC272 and reports that it is a Cortex-M7, which seems to indicate the RT1176 is somewhat alive and the DAP interface is working. After setting PC/SP, resetting the target, and starting the target, it reports errors that it cannot read registers while the CPU is running. The Segger J-Link GDB Server output is below in case it provides any clues to our problem.

We have checked supply voltages, power-up supply & signal sequence. Boot mode levels look okay. We have dip switches the same as on the RT1176-EVK so we can easily switch between boot modes. 24MHZ and 32KHZ crystals are running. POR_B looks okay at power-up. The RT1176 is not getting hot and supply current seems reasonable.

Testing has been done on multiple boards that are all behaving the same so it looks like we have the same problem on all boards.

Any advice you can provide would be appreciated. Thank you!

Segger J-Link Output:

I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Found SW-DP with ID 0x6BA02477
DPIDR: 0x6BA02477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FD000
CPUID register: 0x411FC272. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p2, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FD000
[0][0]: E00FE000 CID B105100D PID 000BB4C8 ROM Table
ROMTbl[1] @ E00FE000
[1][0]: E00FF000 CID B105100D PID 000BB4C7 ROM Table
ROMTbl[2] @ E00FF000
[2][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[2][1]: E0001000 CID B105E00D PID 000BB002 DWT
[2][2]: E0002000 CID B105E00D PID 000BB00E FPB-M7
[2][3]: E0000000 CID B105E00D PID 000BB001 ITM
[1][1]: E0041000 CID B105900D PID 001BB975 ETM-M7
[1][2]: E0042000 CID B105900D PID 004BB906 CTI
[0][1]: E0043000 CID B105900D PID 001BB908 CSTF
Cache: Separate I- and D-cache.

I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Connected to target
Waiting for GDB connection...Connected to 127.0.0.1
Reading all registers
Read 4 bytes @ address 0x00223104 (Data = 0xF7DEE7FE)
Read 2 bytes @ address 0x00223104 (Data = 0xE7FE)
Connected to 127.0.0.1
Reading all registers
Read 4 bytes @ address 0x00223104 (Data = 0xF7DEE7FE)
Read 2 bytes @ address 0x00223104 (Data = 0xE7FE)
Received monitor command: reset
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
AfterResetTarget() start
Valid application detected. Setting PC / SP manually.
AfterResetTarget() end
Resetting target
Downloading 8192 bytes @ address 0x30000000 - Verified OK
Downloading 15952 bytes @ address 0x30002000 - Verified OK
Downloading 11288 bytes @ address 0x30005E50 - Verified OK
Downloading 4 bytes @ address 0x30008A68 - Verified OK
J-Link: Flash download: Bank 0 @ 0x30000000: 1 range affected (65536 bytes)
J-Link: Flash download: Total: 0.722s (Prepare: 0.032s, Compare: 0.019s, Erase: 0.113s, Program & Verify: 0.285s, Restore: 0.271s)
J-Link: Flash download: Program & Verify speed: 224 KB/s
Writing register (PC = 0x300024e8)
Read 4 bytes @ address 0x300024E8 (Data = 0x4B10B672)
Reading 64 bytes @ address 0x00223100
Read 4 bytes @ address 0x300024E8 (Data = 0x4B10B672)
Reading all registers
Read 4 bytes @ address 0x300024E8 (Data = 0x4B10B672)
Reading 64 bytes @ address 0x30002900
Read 2 bytes @ address 0x30002930 (Data = 0xF002)
Reading 64 bytes @ address 0x300024C0
Reading 64 bytes @ address 0x30002500
Received monitor command: semihosting enable
Semi-hosting enabled (Handle on breakpoint instruction hit)
Received monitor command: exec SetRestartOnClose=1
Executed SetRestartOnClose=1
Received monitor command: reset
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
AfterResetTarget() start
Valid application detected. Setting PC / SP manually.
PC = 0x300024E9
SP = 0x20040000
Clean & invalidate cached CPU registers
AfterResetTarget() end
Resetting target
Setting breakpoint @ address 0x30002930, Size = 2, BPHandle = 0x0001
Starting target CPU...
ERROR: Cannot read register 15 (R15) while CPU is running
Reading all registers
ERROR: Cannot read register 0 (R0) while CPU is running
ERROR: Cannot read register 1 (R1) while CPU is running
ERROR: Cannot read register 2 (R2) while CPU is running
ERROR: Cannot read register 3 (R3) while CPU is running
ERROR: Cannot read register 4 (R4) while CPU is running
ERROR: Cannot read register 5 (R5) while CPU is running
ERROR: Cannot read register 6 (R6) while CPU is running
ERROR: Cannot read register 7 (R7) while CPU is running
ERROR: Cannot read register 8 (R8) while CPU is running
ERROR: Cannot read register 9 (R9) while CPU is running
ERROR: Cannot read register 10 (R10) while CPU is running
ERROR: Cannot read register 11 (R11) while CPU is running
ERROR: Cannot read register 12 (R12) while CPU is running
ERROR: Cannot read register 13 (R13) while CPU is running
ERROR: Cannot read register 14 (R14) while CPU is running
ERROR: Cannot read register 15 (R15) while CPU is running
ERROR: Cannot read register 16 (XPSR) while CPU is running
ERROR: Cannot read register 17 (MSP) while CPU is running
ERROR: Cannot read register 18 (PSP) while CPU is running
ERROR: Cannot read register 24 (PRIMASK) while CPU is running
ERROR: Cannot read register 25 (BASEPRI) while CPU is running
ERROR: Cannot read register 26 (FAULTMASK) while CPU is running
ERROR: Cannot read register 27 (CONTROL) while CPU is running
ERROR: Cannot read register 32 (FPSCR) while CPU is running
ERROR: Cannot read register 33 (FPS0) while CPU is running
ERROR: Cannot read register 34 (FPS1) while CPU is running
ERROR: Cannot read register 35 (FPS2) while CPU is running
ERROR: Cannot read register 36 (FPS3) while CPU is running
ERROR: Cannot read register 37 (FPS4) while CPU is running
ERROR: Cannot read register 38 (FPS5) while CPU is running
ERROR: Cannot read register 39 (FPS6) while CPU is running
ERROR: Cannot read register 40 (FPS7) while CPU is running
ERROR: Cannot read register 41 (FPS8) while CPU is running
ERROR: Cannot read register 42 (FPS9) while CPU is running
ERROR: Cannot read register 43 (FPS10) while CPU is running
ERROR: Cannot read register 44 (FPS11) while CPU is running
ERROR: Cannot read register 45 (FPS12) while CPU is running
ERROR: Cannot read register 46 (FPS13) while CPU is running
ERROR: Cannot read register 47 (FPS14) while CPU is running
ERROR: Cannot read register 48 (FPS15) while CPU is running
ERROR: Cannot read register 49 (FPS16) while CPU is running
ERROR: Cannot read register 50 (FPS17) while CPU is running
ERROR: Cannot read register 51 (FPS18) while CPU is running
ERROR: Cannot read register 52 (FPS19) while CPU is running
ERROR: Cannot read register 53 (FPS20) while CPU is running
ERROR: Cannot read register 54 (FPS21) while CPU is running
ERROR: Cannot read register 55 (FPS22) while CPU is running
ERROR: Cannot read register 56 (FPS23) while CPU is running
ERROR: Cannot read register 57 (FPS24) while CPU is running
ERROR: Cannot read register 58 (FPS25) while CPU is running
ERROR: Cannot read register 59 (FPS26) while CPU is running
ERROR: Cannot read register 60 (FPS27) while CPU is running
ERROR: Cannot read register 61 (FPS28) while CPU is running
ERROR: Cannot read register 62 (FPS29) while CPU is running
ERROR: Cannot read register 63 (FPS30) while CPU is running
ERROR: Cannot read register 64 (FPS31) while CPU is running
ERROR: Cannot read register 33 (FPS0) while CPU is running
ERROR: Cannot read register 34 (FPS1) while CPU is running
ERROR: Cannot read register 35 (FPS2) while CPU is running
ERROR: Cannot read register 36 (FPS3) while CPU is running
ERROR: Cannot read register 37 (FPS4) while CPU is running
ERROR: Cannot read register 38 (FPS5) while CPU is running
ERROR: Cannot read register 39 (FPS6) while CPU is running
ERROR: Cannot read register 40 (FPS7) while CPU is running
ERROR: Cannot read register 41 (FPS8) while CPU is running
ERROR: Cannot read register 42 (FPS9) while CPU is running
ERROR: Cannot read register 43 (FPS10) while CPU is running
ERROR: Cannot read register 44 (FPS11) while CPU is running
ERROR: Cannot read register 45 (FPS12) while CPU is running
ERROR: Cannot read register 46 (FPS13) while CPU is running
ERROR: Cannot read register 47 (FPS14) while CPU is running
ERROR: Cannot read register 48 (FPS15) while CPU is running
ERROR: Cannot read register 49 (FPS16) while CPU is running
ERROR: Cannot read register 50 (FPS17) while CPU is running
ERROR: Cannot read register 51 (FPS18) while CPU is running
ERROR: Cannot read register 52 (FPS19) while CPU is running
ERROR: Cannot read register 53 (FPS20) while CPU is running
ERROR: Cannot read register 54 (FPS21) while CPU is running
ERROR: Cannot read register 55 (FPS22) while CPU is running
ERROR: Cannot read register 56 (FPS23) while CPU is running
ERROR: Cannot read register 57 (FPS24) while CPU is running
ERROR: Cannot read register 58 (FPS25) while CPU is running
ERROR: Cannot read register 59 (FPS26) while CPU is running
ERROR: Cannot read register 60 (FPS27) while CPU is running
ERROR: Cannot read register 61 (FPS28) while CPU is running
ERROR: Cannot read register 62 (FPS29) while CPU is running
ERROR: Cannot read register 63 (FPS30) while CPU is running
ERROR: Cannot read register 64 (FPS31) while CPU is running
Removing breakpoint @ address 0x30002930, Size = 2
WARNING: Failed to read memory @ address 0xDEADBEEE
WARNING: Failed to read memory @ address 0xDEADBEEE
WARNING: Failed to read memory @ address 0xE00FDFF4
WARNING: Failed to read memory @ address 0xE00FDFF4
WARNING: Failed to read memory @ address 0xE00FDFF7
Reading 64 bytes @ address 0xDEADBEC0
WARNING: Failed to read memory @ address 0xDEADBEC0
WARNING: Failed to read memory @ address 0xDEADBEEE
WARNING: Failed to read memory @ address 0xDEADBEEE
ERROR: Cannot read register 18 (PSP) while CPU is running
Reading register (PSP = 0xDEADBEEF)

[mrd]

We can connect with J-Link commander, but when read the memory (mem 0x30000000 0x3ffff) it reads back as 0x00 in all locations.  No errors are reported.  I had expected the Flash locations to be all 0xff since it had never been programmed before.  This likely means the readback isn't working.  I did try erasing (erase 0x3000000 0x33FFFFFF).  No errors are reported, but the memory still reads back as all zeros.  We did try slowing the J-Link clock to 100KHZ per Segger's troubleshooting instructions.

What we have found that works is to set the boot mode switches to Serial Downloader and then use the NXP MCU Boot Utility to program the QSPI though LPUART1.  The MCU Boot Utility doesn't report any errors, but the application we downloaded does not run after change boot switches to boot from the QSPI and cycle power.  After doing this though, we can then use MCUXpresso to download the code (same code as programmed with MCU Boot Utility) to QSPI using the J-Link and it will run.   We've done this now on 3 boards and it worked on all 3.  Is it just that MCU Boot Utility is erasing the QSPI and this allows subsequent downloads through the J-Link to work okay?  Or is there some other initialization that MCU Boot Utility is doing?

Our custom design does not have LPUART1 accessible.  We have to unsolder some connections on the board so it is not really an option for initial programming or initialization.  We were hoping to do initial programming via the debug port.  

We did try using USB0 as USB-HID instead of the LPUART1 for Serial Boot, but we haven't been able to make this work.  USB0 works fine for us though once we get the QSPI flashed with our application so we think the USB0 connections must be okay.  Any help you can provide is appreciated.

[jingpan · Accepted solution]

Hi @mrd ,

It seems you didn't set QE bit before download/read the flash. The MCUBootUtility can do it automatically. You can make a small application which running in RAM to program the new flash QE bit.

Regards,

Jing

[mrd]

Thank you jingpan.  As you said the entire problem with bringing up the new board was that the QSPI NOR Flash (IS24WP128) did not have its non-volatile QE (quad-enable) bit set yet. I was trying to download test code into the QSPI Flash as I had been doing on the RT1170-EVK, but this fails until the QE bit is programmed.

In case others run into this and (like me) would like things spelled out a little, here are a few bits of information that might be helpful.

* I understand the QE bit can be programmed via a boot header per reference manual section "FlexSPI Configuration Block" <or> can be set programmatically with a short program. The advantage of the later is that it is possible to check if the QE bit is already set before writing to the NOR Flash Status Reg, which has a limited number of write operations.

* I found that the SDK has a very helpful example in the driver_examples > flexspi section. Look for flexspi_nor_polling_transfer_cm7. This example already has a method for setting the QE bit. It was easy to add a method to read the Status Reg first and then set the QE bit only when it is cleared. flexspi_nor_polling_transfer_cm7 also has methods for erasing and read/writing sectors. Just comment these out if not needed.

* There is a little complication though since flexspi_nor_polling_transfer_cm7 example is linked for executing-in-place (XIP) from the QSPI flash, which won't work until the QE bit has been set. The fairly-easy solution then is to modify the customized flexspi_nor_polling_transfer_cm7 application so it is linked to run from SRAM_ITC_cm7 RAM. Note that the linkscrips folder need to be deleted since the SRAM_ITC is not cached and there is no need to force flexspi_nor_flash_ops or fls_flexspi to execute from RAM since it is already linked to run from ITC.

* To link the customized flexspi_nor_polling_transfer_cm7 at SRAM_ITC, this tutorial for booting from SD Card was helpful despite it being written for the RT1050. https://mcuoneclipse.com/2019/01/22/tutorial-booting-the-nxp-i-mx-rt-from-micro-sd-card/

* Once flexspi_nor_polling_transfer_cm7 is linked into SRAM_ITC, set your board's boot switches to internal boot from QSPI flash. I use a Segger J-Flash for download and debugging. Despite the QE bit not set yet, internal QSPI Flash boot works okay because the J-Trace is able to download into SRAM_ITC and set the program-counter to the start of main(). The code can then run and be debugged just as it normally would be.

Note that the same customized flexspi_nor_polling_transfer_cm7 (that is linked to SRAM_ITC) can then also be put on a uSD card and run from there. I have found though that the QSPI Flash is apparently not accessible when boot from uSD and execute from SRAM_ITC. My current plan is to run the main application from QSPI...so since I may not need this, I'll leave solving this to another day when it is needed. But, if you know what I might be overlooking, please let me know! Thank you.

[jingpan]

Hi @mrd ,

Please try to set the chip in serial download mode and connect with jlink again.

You can open a J-Link Commander. First use "connect ", if it can connect to RT1176, then try to use the command "mem" to read memory. If all of these command passed, try to erase flash.

Regards,

Jing