IMXRT1170 Cortex M4 Code and Data Relocation

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

IMXRT1170 Cortex M4 Code and Data Relocation

580 次查看
henrynguyen
Contributor IV

Hello,

we are using IMXRT1170 device and without intention to use SDRAM (mimic our final custom board).  

in our application, CM7 boots up as primary and CM4 is the slave.

we found out that the Cortex M4 ITCM and DTCM is quite small for our application (128K each).

The app note AN13264 had some information on boot up where the CM4 image is loaded by CM7 by accessing location 0x20200000 (256KB i think for ITCM and DTCM of CM4).

henrynguyen_0-1681839038767.png

our question is:

1- without SDRAM, is there anyway we can increase the code and data space for CM4?  If we can do it, how can the CM7 load that codes which is larger than 256KB to 0x20200000?  Please point me to the app note.

2- by default, it seems that all CM4 data structures and codes are mapped to ITCM which the compiler complained that it exceed 128KB.  we have to use this attribute __attribute__((section(".noinit.$SRAM_DTC_cm4"))) to remap some large data structures to DTCM.  this reduced the ITCM code size.  Our question is that is there anyway we can put a pragma to remap all data variables to DTCM instead of using attribute for each data structure?

3- we can add another RAM block into CM4 to remap our data.  Assume we can do that but the total space of codes and data exceeds 256KB, how can CM7 load this to CM4?

Thanks,

Henry

 

 

0 项奖励
2 回复数

541 次查看
Masmiseim
Senior Contributor I

Hello henrynguyen,

1) You can place the code into the SPI-Flash and data into OCRAM.
I would avoid the cross dependency between the CM7 core and the CM4 core. Keep it simple and let the CM4 core boot from the SPI flash. The CM4 core can then independently copy the performance critical code and data to the TCM area. Less performance critical parts can stay in SPI-Flash and OCRAM.

2) This is depended on your development environment. In my case the SPI-Flash and OCRAM was the default. Try to check your linker setting.

Regards

0 项奖励

547 次查看
jingpan
NXP TechSupport
NXP TechSupport

Hi @henrynguyen ,

1. Besides M4 TCM, you can also put data into OCRAM1, OCRAM2 and OCRAM ECC. M4 can access these space by default.

2. You can refer to this post for how to move project to SDRAM. The way to OCRAM and SDRAM is same.

https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/How-to-move-CM4-core-project-to-SDRAM-in-RT1176/...

3. After you compile the project and split image to several code parts, and several data parts, you can modify the CM7 project to fit your own CM4 map. 

 

Regards,

Jing

0 项奖励