Help with setting up iMXRT685 to use both FlexSPI ports, one for XIP one for separate flash r/w

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

Help with setting up iMXRT685 to use both FlexSPI ports, one for XIP one for separate flash r/w

跳至解决方案
659 次查看
elemindengineer
Contributor II

Hello, 

 

We have a custom board that uses the iMXRT685. The FlexSPI B port is connected to external NOR flash that holds the image, while the FlexSPI A port is connected to a separate external NAND flash and is used to store data. 

 

Originally in our project, we were reading the entire image out of the NOR flash and executing out of RAM with FlexSPI B. On bootup we configure the FlexSPI A port to interface with the external NAND flash and that  has been working fine with no issues.

 

However, we are now looking at changing things in order to get more code space. We have decided to switch to having the device XIP out of the NOR chip connected to FlexSPI B in order to get the code space we need.

 

We are able to get XIP working with no issues. However, there is a problem we are running into. During the bootup, when the other FlexSPI A port is initialized to interface with the external NAND, the program crashes. The FLEXSPI_Init() will crash the device.

 

This makes perfect sense, when making changes to the FlexSPI peripheral if that effects the XIP FlexSPI B port it would stop working or have issues.

 

My questions are the following.

  • Just want to verify this is a normal use case and possible to do. Is having FlexSPI B running XIP while FlexSPI A is able to work with a separate external flash component an ok use case?
  • Do you have a recommended way to initialize the FlexSPI A without crashing XIP on FlexSPI B? Do we need to still execute some of our bootup code out of RAM? Are there any other recommended ways to do this?
  • Are there any example EVK projects you could refer us to look at? I believe both FlexSPI ports on the EVK are connected to different memory, but one of them was RAM so not sure if it will be useful

 

Thanks, let me know if you need any more information.

标签 (1)
标记 (1)
0 项奖励
1 解答
574 次查看
Omar_Anguiano
NXP TechSupport
NXP TechSupport

It is possible but it has some challenges, since both device will be sharing the interface we need to take care of timing consistency.
When the flash is XIP we will try to avoid the access to the other memory since the access to both simultaneously could cause issues.
Please refer to this appnote: Implement RWW on i.MX RT Series (nxp.com)

Best regards,
Omar

在原帖中查看解决方案

0 项奖励
3 回复数
640 次查看
Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello
I hope you are well.

Both memories cannot be used at the same time. You cannot run XIP on port while port A access to the other memory. The option is to execute code from internal RAM, the examples for accessing pSRAM are executed from internal RAM.

To execute code from internal RAM please:
1. Go to Project > Properties > C/C++ Build > Settings > MCU C Compiler > Preprocessor > Defined symbols and set BOOT_HEADER_ENABLE to 0.

2. Select Project > Properties - C/C++ Build > Settings > Tool Settings > MCU Linker > Managed Linker Script and check Link application to RAM.

Best regards,
Omar

0 项奖励
623 次查看
elemindengineer
Contributor II

Thanks for the response Omar. Can you explain to me why the engineer in this support ticket says it is possible and you say its not?

https://community.nxp.com/t5/i-MX-RT/Can-we-use-a-XIP-flash-and-a-data-flash-at-the-same-FlexSPI/m-p...

This seems like a pretty standard use case. XIP in one port and access a completely different flash chip with the other port in order to read write data.

Just to confirm you are saying if an application is XIP, its impossible to use the other FlexSPI port for any other purposes? That would be surprising to me. 

0 项奖励
575 次查看
Omar_Anguiano
NXP TechSupport
NXP TechSupport

It is possible but it has some challenges, since both device will be sharing the interface we need to take care of timing consistency.
When the flash is XIP we will try to avoid the access to the other memory since the access to both simultaneously could cause issues.
Please refer to this appnote: Implement RWW on i.MX RT Series (nxp.com)

Best regards,
Omar

0 项奖励