We would like to use a large QuadSPI and execute in place.
Our design follows the RT1062 EVK very closely, however we have replaced the IS25WP128 with a larger flash, the IS25LP512M
My question centers around dummy cycles. The default number of dummy cycles for this flash is 6, which corresponds to 75MHz. We desire to run at 133 MHz so have updated "evkmimxrt1062_flexspi_nor_config.c" to reflect using 32-bit address, 133 MHz and 14 dummy cycles.
It appears that changing the number of dummy cycles in the read LUT does not actually change the number of dummy cycles sent to the part, we believe we have observed this on a scope.
1. Does the boot ROM know how to set the Read Parameters to configure the flash for the correct number of dummy cycles?
2. What is the procedure to set the Read Parameters register in the flash so the correct number of dummy cycles match in both the flash device and in the NXP processor?
3. Is there a special LUT entry for setting the read parameters correctly? If so, how is this done?
#define DUMMY_CYCLES (14)
const flexspi_nor_config_t qspiflash_config = {
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
.deviceType = kFlexSpiDeviceType_SerialNOR,
.sflashPadType = kSerialFlash_4Pads,
.serialClkFreq = kFlexSpiSerialClk_133MHz,
.sflashA1Size = 64u * 1024u * 1024u,
.lookupTable =
{
// Read LUTs
FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEC, RADDR_SDR, FLEXSPI_4PAD, 32),
FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, DUMMY_CYCLES, READ_SDR, FLEXSPI_4PAD, 0x04),
},
},
.pageSize = 256u,
.sectorSize = 4u * 1024u,
.blockSize = 64u * 1024u,
.isUniformBlockSize = false,
Thank you for your time in solving this.
