Do the GPIO slew rate and drive strength settings apply to the SEMC SDRAM interface?

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Do the GPIO slew rate and drive strength settings apply to the SEMC SDRAM interface?

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gerry1
Contributor I

It is not clear to me in the reference manual whether the slew rate and drive strength of the SDRAM signals can be set using the GPIO pin settings for these parameters. Are these signals adjustable or do they have default settings that are used?

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nickwallis
Senior Contributor I

Things like drive strength and slew rate are properties of the pin - these are independent of GPIO settings and are set using the IOMUXC. So yes, you can set them independently.

For an example, take a look at the function IOMUXC_SetPinConfig() which you should find calls to in BOARD_InitBootPins()

-Nick

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gerry1
Contributor I

Thanks for your response Nick. So as I understand what you are saying, the pin properties will affect the performance of the SDRAM control, address and data outputs.

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nickwallis
Senior Contributor I

Correct - at least this is my understanding, and also what I have observed on the oscilloscope.

-Nick

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