Byte shift between flexspi ahb bus read flash commands

[jautry]

I have an embedded design using an iMXRT1062 and an ISSI25LP512 flash.  Using this flash, I need to use 4 byte addressing.  There are two ways to do this, one setting the EXTADD bit in flash bank register to force all reads to require 4 byte addressing with the 0xEB quad command, the second to use a new 0xEC quad command which requires 4 byte addressing without the EXTADD bit set.  The LUT is setup to use one of these commands for the continuous read.  The problem I am having is if I have a location that has 0x55,0x42 in it, if I read that location with the 0xEB command with EXTADD set, I get the 0x55 as expected, but if I use the 0xEC command, I get 0x42 at the first location.  It is shifted by one byte.  I can change the offset value in the flexspi.c driver by one byte, but that seems more of a hack.  Not sure what this is or the proper way to address it.  Perhaps someone can enlighten me on it.  Thx

[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
I'd like to suggest that it should assure that the EXTADD bit is 0 when using the introduction 0xEC, and you can use the oscilloscope to visualize the reading process, it might provide clues.
Have a great day,
TIC

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[jautry · Accepted solution]

EXTADD is off.  I do not have a scope that will work at this these frequencies.  Adjusted buffer read to offset this issue which seems to work.  I also put in an inquiry with ISSI on this issue as I suspect it lies with them.