iMX RT1170 Shared Memory

[BTasdemir]

Hi NXP Engineers,

We have been working with iMX RT1170. I reviewed the document called AN13264. I made the communication between the two cores with the MU peripheral but I have to use shared memory. For example, I want to use OCRAM between 0x2000000 and 0x2200000 as shared. Do you have a detailed document and sample project regarding this?

[Miguel04]

Hi @BTasdemir 

I'll look for any documents that can help you.

Meanwhile, I found this posts that could help you.

How to modify the default ITCM/DTCM/OCRAM memory allocations for i.MX RT1064

Cortex-M4 bare-metal application cannot read data from the shared memory(OCRAM)

What is OCRAM?

Read access to OCRAM from M4 core

Some of these threads are from i.MX processor posts, however they can provide usefull information.

I'll let you know if we have better documentation regarding your question. I'll look into it.

Best Regards, Miguel.

[BTasdemir]

Hi Miguel,

I am using the RAM3 region. Base address is 0x2024000. I write array to this address from CM7 with a pointer. When I switch to CM4 with Debug and read these addresses, I see the data has changed. Except base address's data.

[Miguel04]

Hi @BTasdemir 

Are you doing something between writing with CM7 and reading CM4?

I mean is there any other routines or peripherals that keep executing.

Regards, Miguel.

[BTasdemir]

Hi @Miguel04 

I split the OCRAM area. Im using 0x20338000 address for sharing datas. I write data from M4 core to this address and then I want to read same datas in same address. When I read from M4, I can see that the data has changed but when I read from M7, I cannot see that the data has changed. If I stop the code with a breakpoint, the data is updated.