Using rt1050 flexpwm X output

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

Using rt1050 flexpwm X output

2,681 次查看
peter_lombrozo
Contributor IV

We have a hardware configuration that requires putting a PWM signal on the Flexpwm1 output X pin (GPIO_AD_B0_03).  I can get the SDK PWM example to put a PWM on A or B outputs, but not the X output.  I can't seem to make the PWM drivers access that pin for the pwm signal.  How do I configure the FlexPWM1 module, submodule 1 to do this?  Thanks.

标签 (2)
0 项奖励
回复
3 回复数

2,362 次查看
kerryzhou
NXP TechSupport
NXP TechSupport

Hi Peter Lombrozo,

   GPIO_AD_B0_03 can be used as flexpwm1.

pastedImage_3.png

Do you modify the pin_mux.c to configure the pin function?

If you already modify it, and it still can't work.

Please tell me the details about your modified code based on the SDK, then I will help you to check it.


Have a great day,
Kerry

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

0 项奖励
回复

2,362 次查看
peter_lombrozo
Contributor IV

Yes, I had the pin mux correct.  The problem is that the PWM_X channel is not available in the SDK drivers.  However, I got it to work by modifying fsl_pwm.c,h to configure PWM_X that creates a new mode that was not aligned and disabling the deadband.

fsl_pwm.c
10c10
<
---
387a388,396
> case kPWM_NonAligned:
> /* Setup the PWM period for a PWM_X non-aligned signal */
> /* Indicates the start of the PWM period */
> base->SM[subModule].INIT = 0;
> /* Indicates the center value */
> base->SM[subModule].VAL0 = (pulseCnt / 2);
> /* Indicates the end of the PWM period */
> base->SM[subModule].VAL1 = pulseCnt;
> break;
400c409
< else
---
> else if (chnlParams->pwmChannel == kPWM_PwmB)
448c457
< assert(pwmSignal < 2);
---
> assert(pwmSignal < 3);
521a531,543
> }
> break;
> case kPWM_NonAligned: // Only for PWM_X output
> pulseCnt = base->SM[subModule].VAL1;
> /* Calculate pulse width */
> pwmHighPulse = (pulseCnt * dutyCyclePercent) / 100;
> if (pwmSignal == kPWM_PwmX)
> {
> base->SM[subModule].VAL0 = pwmHighPulse;
> //base->SM[subModule].VAL1 = ;

fsl_pwm.h

230c230,231
< kPWM_EdgeAligned /*!< Unsigned edge-aligned */
---
> kPWM_EdgeAligned, /*!< Unsigned edge-aligned */
> kPWM_NonAligned /*!< Not aligned for PWM_X channel*/

0 项奖励
回复

2,362 次查看
kerryzhou
NXP TechSupport
NXP TechSupport

Hi Peter Lombrozo,

    Thanks a lot for your updated information.

    And thank you for the modified point sharing.

   Now, after the modification, do you still have any problem about it?

  If you still have the problems, please kindly let me know.


Have a great day,
Kerry

-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

0 项奖励
回复