RT1051: changed description of GPR14

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RT1051: changed description of GPR14

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mastupristi
Senior Contributor I

Trying to update the SDK from 2.10.0 to 2.11.0, I noticed that some defines related to GPR14 were no longer there. I found matches in Ref Manuals 4 and 5.

 

Ref Man 4:

ref4.png

 

 

Ref Man 5:

ref5.png

 

In the Revision history of Release 5 there is no mention of this change, so I have no idea why.

I'm using those fields because, as I mentioned, I change the size of ITC and DTC at startup.

So the questions are:
- is writing to bits 16~23 of GPR14 ignored, or harmful (thus to be avoided)?

- In rev 4 of Ref. Man. the function performed by CM7_CFGDTCMSZ, CM7_CFGITCMSZ in the GPR14 register was described. If that function is not performed by those bits in GPR14, is there some other register I should write? Or is this function completely useless?

 

I followed the directions of AN12077, where it still mentions the CM7_CFGDTCMSZ and CM7_CFGITCMSZ fields of GPR14, and says to write them. This Application Note should be updated.

 

best regrads

Max

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rastislav_pavlanin
NXP Employee
NXP Employee

Hello @mastupristi ,

the true is that we have decided to remove this feature from reference manual because it at the end does not take effect when written on the fly. It can take affect on RT10xx only by writing and performing system reset (not POR). The FlexRAM re-configuration considering AN12077 should also not be affected

 

Simply said: this configuration has been related to the ARM configuration of CM7 on RT1xxx which is default. However, FlexRAM TCM reconfiguration consider NXP base approach, no affect CM7 ARM configuration on RT1xxx. 

 

regards

R.  

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jeremyzhou
NXP Employee
NXP Employee

Hi,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) Is there some other register I should write? Or is this function completely useless?
-- I think it's useless, so remove the bits in the updated version of RM.
Have a great day,
TIC

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mastupristi
Senior Contributor I

I think it's useless, so remove the bits in the updated version of RM.

Is what you say your opinion? Or is it the official version of NXP? Given what you write, it's not clear to me.

In any case, you didn't say anything about the discrepancy between RM rev5 and AN12077. Do you want to express an opinion on that as well?

best regards

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jeremyzhou
NXP Employee
NXP Employee

Hi,
Thanks for your reply.
It's my own opinion, and I'll contact the AE team for confirmation and share the feedback with you later.
Have a great day,
TIC

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jeremyzhou
NXP Employee
NXP Employee

Hi,
Thanks for your reply.
There is feedback from the AE team.

It's the design team that decides to remove such information to avoid customer misunderstanding.
On-the-fly change is not supported on all RT series. RT10xx can change the GPR register value, then trigger a system reset, after reset the value takes effect as the GPR won’t reset (RT10xx GPR only resets on POR reset). RT1170 can’t do this as the system reset will reset the GPR too.
So we don’t provide software FLEXRAM allocation function and only configured through FUSE setting which aligned with latest RM now.


Have a great day,
TIC

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mastupristi
Senior Contributor I

 

On-the-fly change is not supported on all RT series.

 

We have several product lines that use RT1051. For each of them, production is in the tens of thousands per year. Each of these configures the FlexRAM first thing in the ResetISR which is in flash (following the directions of AN12077).

An example code is as follows:

 

__attribute__((naked, section(".startup.reset"))) void ResetISR(void) {

    // Disable interrupts
    __asm volatile("	cpsid i");

    /* Change ITC/DTC/OCRAM dimension */
    IOMUXC_GPR->GPR17 = 0b01011010101011111111101010100101; /* config from AN12077: 128KB OCRAM, 256KB DTC, 128KB ITC */

    IOMUXC_GPR->GPR16 |= IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL(1); /* select GPR17->FLEXRAM_BANK_CFG to configure mem */

    IOMUXC_GPR->GPR14 = (IOMUXC_GPR->GPR14 & ~IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK) |
                        IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(9); /* Set ITC to 256KB */ /* <---- this field is no longer there */

 

 

RT10xx can change the GPR register value, then trigger a system reset, after reset the value takes effect as the GPR won’t reset (RT10xx GPR only resets on POR reset)

As I said, we change the FlexRAM config on RT1051 first thing after reset without having to do the "FlexRAM_config_change -> reset -> run" cycle. We have tens of thousands of products on the field and no one has ever seen a problem. Given the numbers, I don't think luck has anything to do with it.

 

RT1170 can’t do this as the system reset will reset the GPR too.

At the moment I have no way to try on an RT1170, but I think things work the same as on RT1051, and then you can do the configuration of FlexRAM in the ReseISR running in flash.

 

best regards

Max

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jeremyzhou
NXP Employee
NXP Employee

Hi,
Thanks for you reply.
According to the AE's advice, You can add some codes to reallocate the FlexRAM in the ResetISR, it should work well for the RT1050 actually, however, it can'T do that for the RT1170.
Have a great day,
TIC

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mastupristi
Senior Contributor I

According to the AE's advice

What is "AE"?

however, it seems that RT1050 Ref Man and AN12077 were written by different firms, and/or refer to different products

 

best regards

Max

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jeremyzhou
NXP Employee
NXP Employee

Hi,
Thanks for your reply.
1) What is "AE"?
-- Application engineer team.
Have a great day,
TIC

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