NOR flash connected to FlexSPI2 on i.MX RT1062 - data offset

[tmaughan]

I've got an interesting issue which I'm sure is a configuration problem.   This is my first go with QSPI flash devices and the i.MX range of parts.   I'm usually running a lot slower on M4 or smaller.

I have 2 NOR flash devices connected to the RT1062, an 8MB on FlexSPI for boot and a second 32MB on FlexSPI2 which is used to boot an FPGA.

I'm using MBed which has a couple of bugs in the board support package (ADC and UART) but I have them sorted.

I have based my code to access the second flash on the flash_api.c that comes with the MBed RT1050 BSP:

https://github.com/ARMmbed/mbed-os/blob/master/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMX...

Replacing FPLEXSPI with FLEXSPI2 and so far I've only copied enough code to enable reading.

It works and I can see the flash mapped to 0x70000000 BUT the first 2 bytes at 0x70000000 and 0x700000001 are both 0x00.   The rest of the data is there and in the right order but all offset by 2.

0x00 0x00 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF
0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF
0xFF 0xFF 0x00 0x00 0x00 0xBB 0x11 0x22 0x00 0x44 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF

It should be (snipped from the FPGA programming file)

FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
000000BB11220044FFFFFFFFFFFFFFFF

 I've confirmed the flash contents by reading it back with the FPGA JTAG tools.

MPU region is set as type 1, not sharable, is cacheable and is bufferable.

FlexSPI2 clock is 32MHz (PLL3 PFD0 div by

MBeds pin configuration is a bit funny but I'm using FlexSPI2 A pinouts (GPIO_EMC_24 as CS)

Any ideas?

[jeremyzhou]

Hi @tmaughan ，
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
I think I need more information, whether you can provide the schematic of the platform.
Have a great day,
TIC

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[tmaughan · Accepted solution]

Thanks for the reply.   I knew sleeping on the problem would help me as I went back to the datasheets and realised the 32MB flash needed more dummy cycles for the read.   So problem solved.