How to use JLINK with octal flash on EVK RT1176?

[nickwallis]

@kerryzhou 

How to use JLINK with octal flash on EVK RT1176?

I have modified my RT1176 EVK to operate from octal flash, and this is working OK if I use the NXP MCU boot utility to program it.

But I would like to use an external JLINK with mcuxpresso, but I cannot get this working.

I have seen this KB article:

https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/RT1170-Octal-flash-enablement/ta-p/1498369

But, how to compile the source code project of RT-UFL? We don't have Keil.

How to "Generate a new MIMXRT_FLEXSPI_UV5_UFL.FLM programming algorithm"?

Please explain how we use JLINK with octal flash on the RT1176 EVK, thanks!

[nickwallis]

@jingpan  @kerryzhou 

Hmmm, now it has stopped working! It worked a couple of times OK (once with Jlink commander, once with Mcuxpresso) but now it is not working again.

It seems, MIMXRT1170-EVK with octal flash operation is not stable?

Here is the error:

J-Link>loadfile "C:\mcuxpresso_ws_11p7\evkmimxrt1170_iled_blinky_octalFlash_cm7\Debug\evkmimxrt1170_iled_blinky_octalFlash_cm7.hex" 0x30000000
'loadfile': Performing implicit reset & halt of MCU.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Reset: Core did not halt after reset, trying to disable WDT.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Core did not halt after reset, halting it manually.
AfterResetTarget() start
J-Link script: 0x5AA60FF0 has been written to address 0xFFFC
AfterResetTarget() end
Downloading file [C:\mcuxpresso_ws_11p7\evkmimxrt1170_iled_blinky_octalFlash_cm7\Debug\evkmimxrt1170_iled_blinky_octalFlash_cm7.hex]...
****** Error: Failed to perform RAMCode-sided Prepare()
Unspecified error -1
Script processing completed.
Unable to perform operation!
Command failed with exit code 1

[jingpan]

Hi @nickwallis ,

You can use MCUBootUtility to erase the flash and try again.

Regards,

Jing

[nickwallis]

Hi @jingpan  @kerryzhou 

Note, it seems to work OK if I use the solution from Kerry from this post:

https://community.nxp.com/t5/i-MX-RT/How-to-program-rt1170-evk-octal-flash-with-JLink/td-p/1486444

Device selected has to be "MIMXRT1170_UFL_L0_Kerry"

Please advise which is the correct method to use?

thanks!

[nickwallis]

Here is the log from Jlink commander, it seems similar to the errors in the KB article of @kerryzhou 

Connecting to target via SWD
Found SW-DP with ID 0x6BA02477
DPIDR: 0x6BA02477
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[3]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x84770001)
AP[1]: AHB-AP (IDR: 0x24770011)
AP[2]: APB-AP (IDR: 0x54770002)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FD000
CPUID register: 0x411FC272. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p2, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FD000
[0][0]: E00FE000 CID B105100D PID 000BB4C8 ROM Table
ROMTbl[1] @ E00FE000
[1][0]: E00FF000 CID B105100D PID 000BB4C7 ROM Table
ROMTbl[2] @ E00FF000
[2][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[2][1]: E0001000 CID B105E00D PID 000BB002 DWT
[2][2]: E0002000 CID B105E00D PID 000BB00E FPB-M7
[2][3]: E0000000 CID B105E00D PID 000BB001 ITM
[1][1]: E0041000 CID B105900D PID 001BB975 ETM-M7
[1][2]: E0042000 CID B105900D PID 004BB906 CTI
[0][1]: E0043000 CID B105900D PID 001BB908 CSTF
Cache: Separate I- and D-cache.
I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
SetupTarget() start
J-Link script: 0x5AA60FF0 has been written to address 0xFFFC
SetupTarget() end
Memory zones:
  Zone: Default Description: Default access mode
Cortex-M7 identified.
J-Link>exec EnableEraseAllFlashBanks
J-Link>erase 0x30000000 0x3000a000
'erase': Performing implicit reset & halt of MCU.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Core did not halt after reset, halting it manually.
AfterResetTarget() start
J-Link script: 0x5AA60FF0 has been written to address 0xFFFC
AfterResetTarget() end
Erasing selected range...
J-Link: Flash download: Total time needed: 2.839s (Prepare: 1.657s, Compare: 0.000s, Erase: 1.182s, Program: 0.000s, Verify: 0.000s, Restore: 0.000s)

****** Error: Failed to erase sectors.

ERROR: Erase returned with error code -5.
J-Link>

[nickwallis]

thank you @jingpan 

I tried it and sadly it does not work. Please can you help? thanks!

Here is the log from the console:

Executing flash operation 'Program' (Program executable into flash Debug\evkmimxrt1170_iled_blinky_octalFlash_cm7.axf) - Fri Feb 17 08:08:56 GMT 2023
Checking MCU info...
Scanning for targets...
Executing flash action...
SEGGER J-Link Commander V7.84f (Compiled Feb  7 2023 16:52:39)
DLL version V7.84f, compiled Feb  7 2023 16:51:10
J-Link Command File read successfully.
Processing script file...
J-Link>ExitOnError 1
J-Link Commander will now exit on Error
J-Link>r
J-Link connection not established yet but required for command.
Connecting to J-Link via USB...O.K.
Firmware: J-Link V9 compiled May  7 2021 16:26:12
Hardware version: V9.30
J-Link uptime (since boot): N/A (Not supported by this model)
S/N: 59304301
License(s): GDB
VTref=3.285V
Target connection not established yet but required for command.
Device "MIMXRT1170_UFL_L0" selected.
Connecting to target via SWD
Found SW-DP with ID 0x6BA02477
DPIDR: 0x6BA02477
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[3]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x84770001)
AP[1]: AHB-AP (IDR: 0x24770011)
AP[2]: APB-AP (IDR: 0x54770002)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FD000
CPUID register: 0x411FC272. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p2, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FD000
[0][0]: E00FE000 CID B105100D PID 000BB4C8 ROM Table
ROMTbl[1] @ E00FE000
[1][0]: E00FF000 CID B105100D PID 000BB4C7 ROM Table
ROMTbl[2] @ E00FF000
[2][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[2][1]: E0001000 CID B105E00D PID 000BB002 DWT
[2][2]: E0002000 CID B105E00D PID 000BB00E FPB-M7
[2][3]: E0000000 CID B105E00D PID 000BB001 ITM
[1][1]: E0041000 CID B105900D PID 001BB975 ETM-M7
[1][2]: E0042000 CID B105900D PID 004BB906 CTI
[0][1]: E0043000 CID B105900D PID 001BB908 CSTF
Cache: Separate I- and D-cache.
I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
SetupTarget() start
J-Link script: 0x5AA60FF0 has been written to address 0xFFFC
SetupTarget() end
Memory zones:
Default Description: Default access mode
Cortex-M7 identified.
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Core did not halt after reset, halting it manually.
AfterResetTarget() start
J-Link script: 0x5AA60FF0 has been written to address 0xFFFC
AfterResetTarget() end
J-Link>h
PC = 00223104, CycleCnt = 00000000
R0 = 40CAC0B0, R1 = 0A000000, R2 = 80000000, R3 = 0000F000
R4 = E000ED00, R5 = 0022946D, R6 = 001640CD, R7 = 00207DC8
R8 = 2024AE80, R9 = 2024AE84, R10= 00211C0C, R11= 000000F0
R12= 00000000
SP(R13)= 20241D98, MSP= 20241D98, PSP= 00000000, R14(LR) = 002015F3
XPSR = 81000000: APSR = Nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
CFBP = 00000001, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 01
FPS0 = 00000000, FPS1 = 00000000, FPS2 = 00000000, FPS3 = 00000000
FPS4 = 00000000, FPS5 = 00000000, FPS6 = 00000000, FPS7 = 00000000
FPS8 = 00000000, FPS9 = 00000000, FPS10= 00000000, FPS11= 00000000
FPS12= 00000000, FPS13= 00000000, FPS14= 00000000, FPS15= FFFFFFFF
FPS16= 00000000, FPS17= 00000000, FPS18= 00000000, FPS19= 00000000
FPS20= 00000000, FPS21= 00000000, FPS22= 00000000, FPS23= 00000000
FPS24= 00000000, FPS25= 00000000, FPS26= 00000000, FPS27= 00000000
FPS28= 00000000, FPS29= 00000000, FPS30= 00000000, FPS31= FFFFFFFF
FPSCR= 00000000
J-Link>loadfile "C:\mcuxpresso_ws_11p7\evkmimxrt1170_iled_blinky_octalFlash_cm7\Debug\evkmimxrt1170_iled_blinky_octalFlash_cm7.hex" 0x30000000
'loadfile': Performing implicit reset & halt of MCU.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Reset: Core did not halt after reset, trying to disable WDT.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Core did not halt after reset, halting it manually.
AfterResetTarget() start
J-Link script: 0x5AA60FF0 has been written to address 0xFFFC
AfterResetTarget() end
Downloading file [C:\mcuxpresso_ws_11p7\evkmimxrt1170_iled_blinky_octalFlash_cm7\Debug\evkmimxrt1170_iled_blinky_octalFlash_cm7.hex]...
****** Error: Failed to erase sectors.
Unspecified error -1
Script processing completed.
Unable to perform operation!
Command failed with exit code 1

[jingpan]

Hi @nickwallis ,

It's very easy. You needn't compile any source code. Please refer to these post.

https://community.nxp.com/t5/MCUXpresso-IDE/How-to-select-QSPI-flash-for-RT1050-in-MCUXpresso-IDE-v1...

https://community.nxp.com/t5/MCUXpresso-IDE/How-to-select-QSPI-flash-for-RT1050-in-MCUXpresso-IDE-v1...

Regards,

Jing