I am using the AHB bus to write to a HyperRAM device on the FlexSPI bus. The HyperRAM device can support burst sizes up to 128 bytes. But no matter what settings I change within the FlexSPI controller the longest burst I see on the scope is 32 bytes (16 clocks).
Is the AHB to FlexSPI write burst size set to 32 bytes or is there a way to change it?
It is my understanding the AHB_TX_BUF is filled by the AHB master using it's burst settings - SINGLE/INCR4/INCR8/INCR16. That data is then loaded into the ASYNC TX_FIFO which is used by the LUT sequence to be serialized. Is that correct? Section 27.3.10.2 of the reference manual talks about filling data to IP TX FIFO from the AHB bus. Is section 27.3.10.2 referencing the IP_TX_FIFO controlled by IPTXFCR (shown in the block diagram of 27.2.1) or the TX_FIFO ASYNC shown in the same diagram?
