u-boot v2022.04 on MCIMX6S7: `push {r3, lr}` not executed

[andreaaizza]

trying to get a u-boot v2022.04 up and running on a MCIMX6S7 (iMX6 Solo), as OEM is currently proving only old u-boot.

The issue is that it does not step after `push {r3, lr}`, does not execute the push (no change in stack) and keep repeating the same instruction (no update in PC).

Debugging via JLink, I added below some GDB logs and a comparison btw the original OEM (old U-boot) and the new one.

Can anybody explain why this is happening and how to solve?

Regards,
AaWNSD

```
<gdb_log>
Breakpoint 1, s_init () at arch/arm/mach-imx/mx6/soc.c:615
615 if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sll())
1: x/i $pc
=> 0x17802200 <s_init>: push {r3, lr}
Dump of assembler code for function s_init:
=> 0x17802200 <+0>: push {r3, lr}
0x17802202 <+2>: bl 0x17801e88 <get_cpu_rev>
0x17802206 <+6>: ubfx r0, r0, #12, #9
0x1780220a <+10>: cmp r0, #98 ; 0x62
0x1780220c <+12>: beq.n 0x1780228e <s_init+142>
0x1780220e <+14>: bl 0x17801e88 <get_cpu_rev>
0x17802212 <+18>: ubfx r0, r0, #12, #9
0x17802216 <+22>: cmp r0, #100 ; 0x64
0x17802218 <+24>: beq.n 0x1780228e <s_init+142>
0x1780221a <+26>: bl 0x17801e88 <get_cpu_rev>
0x1780221e <+30>: ubfx r0, r0, #12, #9
0x17802222 <+34>: cmp r0, #101 ; 0x65
0x17802224 <+36>: beq.n 0x1780228e <s_init+142>
0x17802226 <+38>: bl 0x17801e88 <get_cpu_rev>
0x1780222a <+42>: ubfx r0, r0, #12, #9
0x1780222e <+46>: cmp r0, #107 ; 0x6b
0x17802230 <+48>: beq.n 0x1780228e <s_init+142>
0x17802232 <+50>: bl 0x17801e88 <get_cpu_rev>
0x17802236 <+54>: ubfx r0, r0, #12, #9
0x1780223a <+58>: cmp r0, #103 ; 0x67
0x1780223c <+60>: beq.n 0x1780228e <s_init+142>
0x1780223e <+62>: ldr r3, [pc, #120] ; (0x178022b8 <s_init+184>)
0x17802240 <+64>: ldr r2, [r3, #24]
0x17802242 <+66>: dmb sy
0x17802246 <+70>: ubfx r3, r2, #21, #2
0x1780224a <+74>: cmp r3, #2
0x1780224c <+76>: ubfx r2, r2, #18, #2
0x17802250 <+80>: beq.n 0x1780229a <s_init+154>
0x17802252 <+82>: cmp r2, #2
0x17802254 <+84>: beq.n 0x178022a4 <s_init+164>
0x17802256 <+86>: cmp r3, #1
0x17802258 <+88>: beq.n 0x17802296 <s_init+150>
0x1780225a <+90>: cmp r2, #1
0x1780225c <+92>: beq.n 0x17802296 <s_init+150>
0x1780225e <+94>: cmp r3, #3
0x17802260 <+96>: ldr r3, [pc, #88] ; (0x178022bc <s_init+188>)
0x17802262 <+98>: beq.n 0x17802268 <s_init+104>
0x17802264 <+100>: cmp r2, #3
0x17802266 <+102>: bne.n 0x178022b0 <s_init+176>
0x17802268 <+104>: dmb sy
0x1780226c <+108>: mov.w r1, #2155905152 ; 0x80808080
0x17802270 <+112>: ldr r2, [pc, #76] ; (0x178022c0 <s_init+192>)
0x17802272 <+114>: str.w r1, [r2, #244] ; 0xf4
0x17802276 <+118>: dmb sy
0x1780227a <+122>: str.w r3, [r2, #260] ; 0x104
0x1780227e <+126>: dmb sy
0x17802282 <+130>: str.w r1, [r2, #248] ; 0xf8
0x17802286 <+134>: dmb sy
0x1780228a <+138>: str.w r3, [r2, #264] ; 0x108
0x1780228e <+142>: pop {r3, pc}
0x17802290 <+144>: mov.w r3, #2147516416 ; 0x80008000
0x17802294 <+148>: b.n 0x17802264 <s_init+100>
0x17802296 <+150>: ldr r3, [pc, #36] ; (0x178022bc <s_init+188>)
0x17802298 <+152>: b.n 0x17802268 <s_init+104>
0x1780229a <+154>: cmp r2, #1
0x1780229c <+156>: bne.n 0x17802290 <s_init+144>
0x1780229e <+158>: mov.w r3, #2147516416 ; 0x80008000
0x178022a2 <+162>: b.n 0x17802268 <s_init+104>
0x178022a4 <+164>: cmp r3, #1
0x178022a6 <+166>: beq.n 0x1780229e <s_init+158>
0x178022a8 <+168>: cmp r3, #3
0x178022aa <+170>: beq.n 0x1780229e <s_init+158>
0x178022ac <+172>: mov.w r3, #2147516416 ; 0x80008000
0x178022b0 <+176>: orr.w r3, r3, #8388608 ; 0x800000
0x178022b4 <+180>: b.n 0x17802268 <s_init+104>
0x178022b6 <+182>: nop
0x178022b8 <+184>: andeq r4, r12, #0
0x178022bc <+188>: andhi r8, r0, r0, lsl #1
0x178022c0 <+192>: andeq r8, r12, #0
End of assembler dump.
r0 0x93ff20 9699104
r1 0x412fc09a 1093648538
r2 0x2a 42
r3 0x2 2
r4 0xa 10
r5 0x17800320 394265376
r6 0x20d8000 34439168
r7 0x94 148
r8 0x0 0
r9 0x93fe40 9698880
r10 0x0 0
r11 0x0 0
r12 0x0 0
sp 0x93fe38 0x93fe38
lr 0x17800668 394266216
pc 0x17802200 0x17802200 <s_init>
cpsr 0x800001f3 2147484147
fpscr 0x6a0a4461 1779057761
r8_usr 0x0 0
r9_usr 0x93fe40 9698880
r10_usr 0x0 0
r11_usr 0x0 0
r12_usr 0x0 0
r13_usr 0x0 0
r14_usr 0x0 0
r8_fiq 0x0 0
r9_fiq 0x0 0
r10_fiq 0x0 0
r11_fiq 0x0 0
r12_fiq 0x0 0
r13_fiq 0x0 0
r14_fiq 0x0 0
spsr_fiq 0x90090738 2416510776
r13_irq 0x0 0
r14_irq 0x0 0
spsr_irq 0x4030407 67306503
r13_svc 0x93fe38 9698872
r14_svc 0x17800668 394266216
spsr_svc 0x6a0a4461 1779057761
r13_abt 0x0 0
r14_abt 0x0 0
spsr_abt 0x40d003e 67960894
r13_und 0x0 0
r14_und 0x0 0
spsr_und 0xf45c8 1000904
#0 s_init () at arch/arm/mach-imx/mx6/soc.c:615
#1 0x17800668 in lowlevel_init () at arch/arm/cpu/armv7/lowlevel_init.S:67
#2 0x17800324 in save_boot_params_ret () at arch/arm/cpu/armv7/start.S:124
Backtrace stopped: previous frame identical to this frame (corrupt stack?)

Breakpoint 1, s_init () at arch/arm/mach-imx/mx6/soc.c:615
615 if (is_mx6sx() || is_mx6ul() || is_mx6ull() || is_mx6sll())
1: x/i $pc
=> 0x17802200 <s_init>: push {r3, lr}
r0 0x93ff20 9699104
r1 0x412fc09a 1093648538
r2 0x2a 42
r3 0x2 2
r4 0xa 10
r5 0x17800320 394265376
r6 0x20d8000 34439168
r7 0x94 148
r8 0x0 0
r9 0x93fe40 9698880
r10 0x0 0
r11 0x0 0
r12 0x0 0
sp 0x93fe38 0x93fe38
lr 0x17800668 394266216
pc 0x17802200 0x17802200 <s_init>
cpsr 0x800001f3 2147484147
fpscr 0x6a0a4461 1779057761
r8_usr 0x0 0
r9_usr 0x93fe40 9698880
r10_usr 0x0 0
r11_usr 0x0 0
r12_usr 0x0 0
r13_usr 0x0 0
r14_usr 0x0 0
r8_fiq 0x0 0
r9_fiq 0x0 0
r10_fiq 0x0 0
r11_fiq 0x0 0
r12_fiq 0x0 0
r13_fiq 0x0 0
r14_fiq 0x0 0
spsr_fiq 0x90090738 2416510776
r13_irq 0x0 0
r14_irq 0x0 0
spsr_irq 0x4030407 67306503
r13_svc 0x93fe38 9698872
r14_svc 0x17800668 394266216
spsr_svc 0x6a0a4461 1779057761
r13_abt 0x0 0
r14_abt 0x0 0
spsr_abt 0x40d003e 67960894
r13_und 0x0 0
r14_und 0x0 0
spsr_und 0xf45c8 1000904
#0 s_init () at arch/arm/mach-imx/mx6/soc.c:615
#1 0x17800668 in lowlevel_init () at arch/arm/cpu/armv7/lowlevel_init.S:67
#2 0x17800324 in save_boot_params_ret () at arch/arm/cpu/armv7/start.S:124
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
quit
</gdb_log>

<uboot_trace>
=> 0x17800000 <_start>: b 0x178002e8 <reset>
=> 0x178002e8 <reset>: b 0x17800338 <save_boot_params>
=> 0x17800338 <save_boot_params>: b 0x178002ec <save_boot_params_ret>
=> 0x178002ec <save_boot_params_ret>: mrs r0, CPSR
=> 0x178002f0 <save_boot_params_ret+4>: and r1, r0, #31
=> 0x178002f4 <save_boot_params_ret+8>: teq r1, #26
=> 0x178002f8 <save_boot_params_ret+12>: bicne r0, r0, #31
=> 0x178002fc <save_boot_params_ret+16>: orrne r0, r0, #19
=> 0x17800300 <save_boot_params_ret+20>: orr r0, r0, #192 ; 0xc0
=> 0x17800304 <save_boot_params_ret+24>: msr CPSR_fc, r0
=> 0x17800308 <save_boot_params_ret+28>: mrc 15, 0, r0, cr1, cr0, {0}
=> 0x1780030c <save_boot_params_ret+32>: bic r0, r0, #8192 ; 0x2000
=> 0x17800310 <save_boot_params_ret+36>: mcr 15, 0, r0, cr1, cr0, {0}
=> 0x17800314 <save_boot_params_ret+40>: ldr r0, [pc, #132] ; 0x178003a0
=> 0x17800318 <save_boot_params_ret+44>: mcr 15, 0, r0, cr12, cr0, {0}
=> 0x1780031c <save_boot_params_ret+48>: bl 0x1780033c <cpu_init_cp15>
=> 0x1780033c <cpu_init_cp15>: mov r0, #0
=> 0x17800340 <cpu_init_cp15+4>: mcr 15, 0, r0, cr8, cr7, {0}
=> 0x17800344 <cpu_init_cp15+8>: mcr 15, 0, r0, cr7, cr5, {0}
=> 0x17800348 <cpu_init_cp15+12>: mcr 15, 0, r0, cr7, cr5, {6}
=> 0x1780034c <cpu_init_cp15+16>: mcr 15, 0, r0, cr7, cr10, {4}
=> 0x17800350 <cpu_init_cp15+20>: mcr 15, 0, r0, cr7, cr5, {4}
=> 0x17800354 <cpu_init_cp15+24>: mrc 15, 0, r0, cr1, cr0, {0}
=> 0x17800358 <cpu_init_cp15+28>: bic r0, r0, #8192 ; 0x2000
=> 0x1780035c <cpu_init_cp15+32>: bic r0, r0, #7
=> 0x17800360 <cpu_init_cp15+36>: orr r0, r0, #2
=> 0x17800364 <cpu_init_cp15+40>: orr r0, r0, #2048 ; 0x800
=> 0x17800368 <cpu_init_cp15+44>: orr r0, r0, #4096 ; 0x1000
=> 0x1780036c <cpu_init_cp15+48>: mcr 15, 0, r0, cr1, cr0, {0}
=> 0x17800370 <cpu_init_cp15+52>: mrc 15, 0, r0, cr15, cr0, {1}
=> 0x17800374 <cpu_init_cp15+56>: orr r0, r0, #64 ; 0x40
=> 0x17800378 <cpu_init_cp15+60>: mcr 15, 0, r0, cr15, cr0, {1}
=> 0x1780037c <cpu_init_cp15+64>: mov r5, lr
=> 0x17800380 <cpu_init_cp15+68>: mrc 15, 0, r1, cr0, cr0, {0}
=> 0x17800384 <cpu_init_cp15+72>: lsr r3, r1, #20
=> 0x17800388 <cpu_init_cp15+76>: and r3, r3, #15
=> 0x1780038c <cpu_init_cp15+80>: and r4, r1, #15
=> 0x17800390 <cpu_init_cp15+84>: lsl r2, r3, #4
=> 0x17800394 <cpu_init_cp15+88>: orr r2, r4, r2
=> 0x17800398 <cpu_init_cp15+92>: mov pc, r5
=> 0x17800320 <save_boot_params_ret+52>: bl 0x1780039c <cpu_init_crit>
=> 0x1780039c <cpu_init_crit>: b 0x1780064c <lowlevel_init>
=> 0x1780064c <lowlevel_init>: ldr sp, [pc, #24] ; 0x1780066c
=> 0x17800650 <lowlevel_init+4>: bic sp, sp, #7
=> 0x17800654 <lowlevel_init+8>: sub sp, sp, #224 ; 0xe0
=> 0x17800658 <lowlevel_init+12>: bic sp, sp, #7
=> 0x1780065c <lowlevel_init+16>: mov r9, sp
=> 0x17800660 <lowlevel_init+20>: push {r12, lr}
=> 0x17800664 <lowlevel_init+24>: blx 0x17802200 <s_init>
=> 0x17802200 <s_init>: push {r3, lr}
</uboot_trace>

<OEM_uboot_trace>
=> 0x17800000 <_start>: b 0x178002e8 <reset>
=> 0x178002e8 <reset>: b 0x17800338 <save_boot_params>
=> 0x17800338 <save_boot_params>: b 0x178002ec <save_boot_params_ret>
=> 0x178002ec <save_boot_params_ret>: mrs r0, CPSR
=> 0x178002f0 <save_boot_params_ret+4>: and r1, r0, #31
=> 0x178002f4 <save_boot_params_ret+8>: teq r1, #26
=> 0x178002f8 <save_boot_params_ret+12>: bicne r0, r0, #31
=> 0x178002fc <save_boot_params_ret+16>: orrne r0, r0, #19
=> 0x17800300 <save_boot_params_ret+20>: orr r0, r0, #192 ; 0xc0
=> 0x17800304 <save_boot_params_ret+24>: msr CPSR_fc, r0
=> 0x17800308 <save_boot_params_ret+28>: mrc 15, 0, r0, cr1, cr0, {0}
=> 0x1780030c <save_boot_params_ret+32>: bic r0, r0, #8192 ; 0x2000
=> 0x17800310 <save_boot_params_ret+36>: mcr 15, 0, r0, cr1, cr0, {0}
=> 0x17800314 <save_boot_params_ret+40>: ldr r0, [pc, #180] ; 0x178003d0
=> 0x17800318 <save_boot_params_ret+44>: mcr 15, 0, r0, cr12, cr0, {0}
=> 0x1780031c <save_boot_params_ret+48>: bl 0x1780033c <cpu_init_cp15>
=> 0x1780033c <cpu_init_cp15>: mov r0, #0
=> 0x17800340 <cpu_init_cp15+4>: mcr 15, 0, r0, cr8, cr7, {0}
=> 0x17800344 <cpu_init_cp15+8>: mcr 15, 0, r0, cr7, cr5, {0}
=> 0x17800348 <cpu_init_cp15+12>: mcr 15, 0, r0, cr7, cr5, {6}
=> 0x1780034c <cpu_init_cp15+16>: mcr 15, 0, r0, cr7, cr10, {4}
=> 0x17800350 <cpu_init_cp15+20>: mcr 15, 0, r0, cr7, cr5, {4}
=> 0x17800354 <cpu_init_cp15+24>: mrc 15, 0, r0, cr1, cr0, {0}
=> 0x17800358 <cpu_init_cp15+28>: bic r0, r0, #8192 ; 0x2000
=> 0x1780035c <cpu_init_cp15+32>: bic r0, r0, #7
=> 0x17800360 <cpu_init_cp15+36>: orr r0, r0, #2
=> 0x17800364 <cpu_init_cp15+40>: orr r0, r0, #2048 ; 0x800
=> 0x17800368 <cpu_init_cp15+44>: orr r0, r0, #4096 ; 0x1000
=> 0x1780036c <cpu_init_cp15+48>: mcr 15, 0, r0, cr1, cr0, {0}
=> 0x17800370 <cpu_init_cp15+52>: mrc 15, 0, r0, cr15, cr0, {1}
=> 0x17800374 <cpu_init_cp15+56>: orr r0, r0, #16
=> 0x17800378 <cpu_init_cp15+60>: mcr 15, 0, r0, cr15, cr0, {1}
=> 0x1780037c <cpu_init_cp15+64>: mrc 15, 0, r0, cr15, cr0, {1}
=> 0x17800380 <cpu_init_cp15+68>: orr r0, r0, #64 ; 0x40
=> 0x17800384 <cpu_init_cp15+72>: mcr 15, 0, r0, cr15, cr0, {1}
=> 0x17800388 <cpu_init_cp15+76>: mrc 15, 0, r0, cr15, cr0, {1}
=> 0x1780038c <cpu_init_cp15+80>: orr r0, r0, #2048 ; 0x800
=> 0x17800390 <cpu_init_cp15+84>: mcr 15, 0, r0, cr15, cr0, {1}
=> 0x17800394 <cpu_init_cp15+88>: mrc 15, 0, r0, cr15, cr0, {1}
=> 0x17800398 <cpu_init_cp15+92>: orr r0, r0, #2097152 ; 0x200000
=> 0x1780039c <cpu_init_cp15+96>: mcr 15, 0, r0, cr15, cr0, {1}
=> 0x178003a0 <cpu_init_cp15+100>: mrc 15, 0, r0, cr15, cr0, {1}
=> 0x178003a4 <cpu_init_cp15+104>: orr r0, r0, #4194304 ; 0x400000
=> 0x178003a8 <cpu_init_cp15+108>: mcr 15, 0, r0, cr15, cr0, {1}
=> 0x178003ac <cpu_init_cp15+112>: mov r5, lr
=> 0x178003b0 <cpu_init_cp15+116>: mrc 15, 0, r1, cr0, cr0, {0}
=> 0x178003b4 <cpu_init_cp15+120>: lsr r3, r1, #20
=> 0x178003b8 <cpu_init_cp15+124>: and r3, r3, #15
=> 0x178003bc <cpu_init_cp15+128>: and r4, r1, #15
=> 0x178003c0 <cpu_init_cp15+132>: lsl r2, r3, #4
=> 0x178003c4 <cpu_init_cp15+136>: orr r2, r4, r2
=> 0x178003c8 <cpu_init_cp15+140>: mov pc, r5
=> 0x17800320 <save_boot_params_ret+52>: bl 0x178003cc <cpu_init_crit>
=> 0x178003cc <cpu_init_crit>: b 0x178003d4 <lowlevel_init>
=> 0x178003d4 <lowlevel_init>: ldr sp, [pc, #16] ; 0x178003ec
=> 0x178003d8 <lowlevel_init+4>: bic sp, sp, #7
=> 0x178003dc <lowlevel_init+8>: mov r9, #0
=> 0x178003e0 <lowlevel_init+12>: push {r12, lr}
=> 0x178003e4 <lowlevel_init+16>: bl 0x17800a90 <s_init>
=> 0x17800a90 <s_init>: push {r3, lr}
=> 0x17800a94 <s_init+4>: bl 0x17800700 <get_cpu_rev>
=> 0x17800700 <get_cpu_rev>: ldr r2, [pc, #92] ; 0x17800764 <get_cpu_rev+100>
=> 0x17800708 <get_cpu_rev+8>: ubfx r0, r3, #16, #8
</OEM_uboot_trace>
```

[Sanket_Parekh]

Hi @andreaaizza 

You can try IMX6SL EVB.

Please refer the link.

Thanks & Regards

Sanket Parekh

[andreaaizza · Accepted solution]

Any feedback?

It appears u-boot code for other MX6S board in master u-boot `config` generates same init.

Is there any IMX6S7 based dev board working with u-boot loaded from spi rom?