imx6ul boot from NAND

parthitce · ‎01-10-2019

I have a custom board based on phycore imx6UL in which I am able to boot the target from SD card without any problem. Now I wanted to boot from NAND and after reading the imx6 reference manual and various discussions in forums, I understand that imx6 ROM reads the BCD (FCB + DBBT) blocks and proceeds in booting the firmware.

To write my SPL image in ROM understandable form, I have used imx-kobs as recommended. But still the board is not booting from NAND. After flashing the image into /dev/mtd0, I have examined the memory using hexdump and nanddump,

As seen below, hexdump/nanddump shows the "FCB" starts at 27th byte. From the imx6 reference manual I understand that the ROM code reads the first 2112 bytes of first good sector and looks for valid FCB block.

Apart from this as mentioned in section 8.5.2.3 of IMX6ULRM, FCB block starts with 4bytes of zeros (fingerprint checksum) and followed "FCB" itself. But I get totally different things written by kobs-ng. Am I missing some option here?

As my board is not booting from NAND, is my FCB blcoks broken?
How can I write to NAND in a bootable form?
Any recommendations in terms of how many duplicates copies I should maintain?

I am using Freescale imx kernel linux-fslc 4.9.144 (branch 4.9-2.3.x-imx).

hexdump:

00000000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
00000010 00 00 00 00 00 00 76 fc ff ff 46 43 42 20 00 00 |......v...FCB ..|
00000020 00 01 50 3c 19 06 00 00 00 00 00 08 00 00 40 08 |..P<..........@.|
00000030 00 00 40 00 00 00 00 00 00 00 00 00 00 00 00 00 |..@.............|
00000040 00 00 02 00 00 00 00 02 00 00 00 02 00 00 02 00 |................|
00000050 00 00 0a 00 00 00 03 00 00 00 00 00 00 00 00 00 |................|
00000060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
00000070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 |................|
00000080 00 00 80 10 00 00 1a 00 00 00 1a 00 00 00 80 00 |................|
00000090 00 00 00 00 00 00 eb 63 94 76 a9 ad c3 b8 6d 1d |.......c.v....m.|
000000a0 00 a3 32 b2 e8 d3 d0 e2 26 71 3a a8 df 46 34 32 |..2.....&q:..F42|
000000b0 53 21 9a f7 dd ca 46 e5 ad c4 ac c4 36 4e 2f 09 |S!....F.....6N/.|
000000c0 15 94 19 51 29 6f 11 4d 67 1e 66 7a 1e 80 c7 84 |...Q)o.Mg.fz....|
000000d0 7e f4 61 27 b5 5b c8 00 00 00 00 00 08 00 00 00 |~.a'.[..........|
000000e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00000150 00 00 00 00 00 00 00 6b c2 6a f0 45 9a b9 1a bd |.......k.j.E....|
00000160 d9 5d 54 c2 01 5e 56 eb 4d c8 8e e5 1a ca df e2 |.]T..^V.M.......|
00000170 99 32 79 b1 28 48 f9 c3 c1 2b 9c a7 c1 aa 25 ff |.2y.(H...+....%.|
00000180 5b af e4 e0 b3 1d aa 22 35 91 50 6c 8c c8 91 7a |[......"5.Pl...z|
00000190 41 53 d6 fb 73 af 2a 96 00 00 00 00 00 00 00 00 |AS..s.*.........|
000001a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00000800 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
*
00020000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
00020010 00 00 00 00 00 00 76 fc ff ff 46 43 42 20 00 00 |......v...FCB ..|
00020020 00 01 50 3c 19 06 00 00 00 00 00 08 00 00 40 08 |..P<..........@.|
00020030 00 00 40 00 00 00 00 00 00 00 00 00 00 00 00 00 |..@.............|
00020040 00 00 02 00 00 00 00 02 00 00 00 02 00 00 02 00 |................|
00020050 00 00 0a 00 00 00 03 00 00 00 00 00 00 00 00 00 |................|
00020060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
00020070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 |................|
00020080 00 00 80 10 00 00 1a 00 00 00 1a 00 00 00 80 00 |................|
00020090 00 00 00 00 00 00 eb 63 94 76 a9 ad c3 b8 6d 1d |.......c.v....m.|
000200a0 00 a3 32 b2 e8 d3 d0 e2 26 71 3a a8 df 46 34 32 |..2.....&q:..F42|
000200b0 53 21 9a f7 dd ca 46 e5 ad c4 ac c4 36 4e 2f 09 |S!....F.....6N/.|
000200c0 15 94 19 51 29 6f 11 4d 67 1e 66 7a 1e 80 c7 84 |...Q)o.Mg.fz....|
000200d0 7e f4 61 27 b5 5b c8 00 00 00 00 00 08 00 00 00 |~.a'.[..........|
000200e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00020150 00 00 00 00 00 00 00 6b c2 6a f0 45 9a b9 1a bd |.......k.j.E....|
00020160 d9 5d 54 c2 01 5e 56 eb 4d c8 8e e5 1a ca df e2 |.]T..^V.M.......|
00020170 99 32 79 b1 28 48 f9 c3 c1 2b 9c a7 c1 aa 25 ff |.2y.(H...+....%.|
00020180 5b af e4 e0 b3 1d aa 22 35 91 50 6c 8c c8 91 7a |[......"5.Pl...z|
00020190 41 53 d6 fb 73 af 2a 96 00 00 00 00 00 00 00 00 |AS..s.*.........|
000201a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00020800 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
*
00040000 00 00 00 00 44 42 42 54 00 00 00 01 00 00 00 00 |....DBBT........|
00040010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00040800 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
*
00060000 00 00 00 00 44 42 42 54 00 00 00 01 00 00 00 00 |....DBBT........|
00060010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00060800 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
*
00080000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00080400 d1 00 20 40 00 90 90 00 00 00 00 00 00 00 00 00 |.. @............|
00080410 20 84 90 00 00 84 90 00 00 50 91 00 00 00 00 00 | ........P......|
00080420 00 80 90 00 00 f0 00 00 00 00 00 00 d2 00 04 40 |...............@|
00080430 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00081000 0f 00 00 ea 14 f0 9f e5 14 f0 9f e5 14 f0 9f e5 |................|
00081010 14 f0 9f e5 14 f0 9f e5 14 f0 9f e5 14 f0 9f e5 |................|
00081020 40 90 90 00 40 90 90 00 40 90 90 00 40 90 90 00 |@...@...@...@...|

kobs-ng flashing log:

# kobs-ng init -x -w -v --search_exponent=1 --chip_0_device_path=/dev/mtd0 /mnt/SPL
MTD CONFIG:
chip_0_device_path = "/dev/mtd0"
chip_1_device_path = "(null)"
search_exponent = 1
data_setup_time = 80
data_hold_time = 60
address_setup_time = 25
data_sample_time = 6
row_address_size = 3
column_address_size = 2
read_command_code1 = 0
read_command_code2 = 48
boot_stream_major_version = 1
boot_stream_minor_version = 0
boot_stream_sub_version = 0
ncb_version = 3
boot_stream_1_address = 0
boot_stream_2_address = 0
-- We add the 1k-padding to the uboot.
.tmp_kobs_ng: verifying using key '00000000000000000000000000000000'
.tmp_kobs_ng: is a valid bootstream for key '00000000000000000000000000000000'
mtd: use new bch layout raw access mode
mtd: opening: "/dev/mtd0"
NFC geometry :
ECC Strength : 4
Page Size in Bytes : 2084
Metadata size : 10
ECC Chunk Size in byte : 512
ECC Chunk count : 4
Block Mark Byte Offset : 0
Block Mark Bit Offset : 0
====================================================
mtd: opened '/dev/mtd0' - '(null)'
mtd: max_boot_stream_size_in_bytes = 8126464
mtd: boot_stream_size_in_bytes = 53248
mtd: boot_stream_size_in_pages = 26
mtd: #1 0x00080000 - 0x00840000 (0x0008d000)
mtd: #2 0x00840000 - 0x01000000 (0x0084d000)
FCB
m_u32Checksum = 0x00000000
m_u32FingerPrint = 0x20424346
m_u32Version = 0x01000000
m_NANDTiming.m_u8DataSetup = 80
m_NANDTiming.m_u8DataHold = 60
m_NANDTiming.m_u8AddressSetup = 25
m_NANDTiming.m_u8DSAMPLE_TIME = 6
m_u32PageDataSize = 2048
m_u32TotalPageSize = 2112
m_u32SectorsPerBlock = 64
m_u32NumberOfNANDs = 0
m_u32TotalInternalDie = 0
m_u32CellType = 0
m_u32EccBlockNEccType = 2
m_u32EccBlock0Size = 512
m_u32EccBlockNSize = 512
m_u32EccBlock0EccType = 2
m_u32MetadataBytes = 10
m_u32NumEccBlocksPerPage = 3
m_u32EccBlockNEccLevelSDK = 0
m_u32EccBlock0SizeSDK = 0
m_u32EccBlockNSizeSDK = 0
m_u32EccBlock0EccLevelSDK = 0
m_u32NumEccBlocksPerPageSDK = 0
m_u32MetadataBytesSDK = 0
m_u32EraseThreshold = 0
m_u32Firmware1_startingPage = 256
m_u32Firmware2_startingPage = 4224
m_u32PagesInFirmware1 = 26
m_u32PagesInFirmware2 = 26
m_u32DBBTSearchAreaStartAddress = 128
m_u32BadBlockMarkerByte = 0
m_u32BadBlockMarkerStartBit = 0
m_u32BBMarkerPhysicalOffset = 2048
m_u32BCHType = 0
m_NANDTMTiming.m_u32TMTiming2_ReadLatency = 0
m_NANDTMTiming.m_u32TMTiming2_PreambleDelay = 0
m_NANDTMTiming.m_u32TMTiming2_CEDelay = 0
m_NANDTMTiming.m_u32TMTiming2_PostambleDelay = 0
m_NANDTMTiming.m_u32TMTiming2_CmdAddPause = 0
m_NANDTMTiming.m_u32TMTiming2_DataPause = 0
m_NANDTMTiming.m_u32TMSpeed = 0
m_NANDTMTiming.m_u32TMTiming1_BusyTimeout = 0
m_u32DISBBM = 0
m_u32BBMarkerPhysicalOffsetInSpareData = 0
m_u32OnfiSyncEnable = 0
m_NANDONFITiming.m_u32ONFISpeed = 0
m_NANDONFITiming.m_u32ONFITiming_ReadLatency = 0
m_NANDONFITiming.m_u32ONFITiming_CEDelay = 0
m_NANDONFITiming.m_u32ONFITiming_PreambleDelay = 0
m_NANDONFITiming.m_u32ONFITiming_PostambleDelay = 0
m_NANDONFITiming.m_u32ONFITiming_CmdAddPause = 0
m_NANDONFITiming.m_u32ONFITiming_DataPause = 0
m_NANDONFITiming.m_u32ONFITiming_BusyTimeout = 0
m_u32DISBBSearch = 0
m_u32RandomizerEnable = 0
m_u32ReadRetryEnable = 0
m_u32ReadRetrySeqLength = 0
DBBT
m_u32Checksum = 0x00000000
m_u32FingerPrint = 0x54424244
m_u32Version = 0x01000000
m_u32DBBTNumOfPages = 0
Firmware: image #0 @ 0x80000 size 0xd000 - available 0x7c0000
Firmware: image #1 @ 0x840000 size 0xd000 - available 0x7c0000
-------------- Start to write the [ FCB ] -----
mtd: erasing @0:0x0-0x20000
mtd: Writing FCB0 [ @0:0x0 ] (840) *
mtd: erasing @0:0x20000-0x40000
mtd: Writing FCB1 [ @0:0x20000 ] (840) *
mtd_commit_bcb(FCB): status 0

-------------- Start to write the [ DBBT ] -----
mtd: erasing @0:0x40000-0x60000
mtd: Writing DBBT0 [ @0:0x40000 ] (800) *
mtd: erasing @0:0x60000-0x80000
mtd: Writing DBBT1 [ @0:0x60000 ] (800) *
mtd_commit_bcb(DBBT): status 0

---------- Start to write the [ .tmp_kobs_ng ]----
mtd: Writting .tmp_kobs_ng: #0 @0: 0x00080000 - 0x0008d000
mtd: erasing @0:0x80000-0xa0000
mtd: We write one page for save guard. *
mtd: Writting .tmp_kobs_ng: #1 @0: 0x00840000 - 0x0084d000
mtd: erasing @0:0x840000-0x860000
mtd: We write one page for save guard. *

igorpadykov · ‎01-10-2019

Hi Parthiban

kernel linux-fslc is not supported by nxp (it may be supported using meta-fsl-arm mailing list
https://lists.yoctoproject.org/listinfo/meta-freescale),

one can try with nxp official linux releases from linux-imx - i.MX Linux kernel

repository and patches from

How-To use NAND boot on i.MX6UL EVK board

Best regards
igor
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parthitce · ‎01-11-2019

Hi Igor,

I will check with the kernel tree which you have mentioned. But regarding the FCB blocks placement using the NXP toolk kobs-ng, is it wrong?

Does using different kernel will have effect placement location for FCB blocks?

Thanks,

Parthiban N

igorpadykov · ‎01-11-2019

Hi Parthiban

in general kernels (fslc and Code Aurora git repositories ) are different and this may help.

Best regards
igor