Hello, we are currently trying to run a custom MIPI sensor to an IMX8M Plus in which we receive 168 MIPI frames (340W x 25H @ 16bpp) per second. However, we are now running into interrupt latency problems on the IMX8MP as we are starting to drop frames. I have applied PREEMPT_RT patch onto Linux v5.10.72 but we are still dropping frames occasionally. I will probably play around with the thread priorities tomorrow.
However, the real solution would be reduce the number of interrupts and we are wondering if we could do that in the MIPI CSI and ISI kernel drivers. I would like to know if it's possible to configure the MIPI CSI2, Gasket and ISI registers to trigger the frame done handler (mxc_isi_cap_frame_write_done()) in mxc_isi_irq_handler() after 2 or more frames instead of every frame. IE Can it buffer more frames before triggering the frame done interrupt?
A long time ago we managed to do this on a different IMX processor that did not have the CSI Gasket.
Note that we are not able to change the MIPI frames sizes from the sensor so we can only modify the kernel/userspace code on the IMX8MP.
