[i.MX8MN] recommendation routing signal length for LPDDR4

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[i.MX8MN] recommendation routing signal length for LPDDR4

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waynejeong
Contributor II

There is a DDR Layout guide in IMX8MNHDG and there are routing recommendations but units are ps.

I need recommendation route signal length. May I get recommendation routing signal length to design layout with LPDDR4?

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joanxie
NXP TechSupport
NXP TechSupport

all of length matching delay is posted in the hardware guide, the suggestion from HW team is "Our primary recommendation is to follow our reference design as much as possible and to minimize the trace length."

you also can refer to the document as below:

https://www.nxp.com.cn/docs/en/application-note/AN12298.pdf”

 

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joanxie
NXP TechSupport
NXP TechSupport

all of length matching delay is posted in the hardware guide, the suggestion from HW team is "Our primary recommendation is to follow our reference design as much as possible and to minimize the trace length."

you also can refer to the document as below:

https://www.nxp.com.cn/docs/en/application-note/AN12298.pdf”

 

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