i.MX8M Quad : MIPI-CSI phy clock

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i.MX8M Quad : MIPI-CSI phy clock

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dokim
Contributor II

Hello.

I have a question for setting up the MIPI-CSI2 on i.MX8MQ-EVK.

 How to set the MIPI-CSI phy clock on i.MX8MQ-EVK?

 Setting this clock to custom seems possible on i.MX8QM or QXP.

 Then, can I set this clock to custom on i.MX8MQ?

Thanks.

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi DONGOH 

the current CSI core clock is from SYS1_PLL_266M, code is in linux-imx\drivers\clk\imx\clk-imx8mq.c

 clk_set_parent(clks[IMX8MQ_CLK_CSI1_CORE_SRC], clks[IMX8MQ_SYS1_PLL_266M]);
 clk_set_parent(clks[IMX8MQ_CLK_CSI1_PHY_REF_SRC], clks[IMX8MQ_SYS2_PLL_1000M]);
 clk_set_parent(clks[IMX8MQ_CLK_CSI1_ESC_SRC], clks[IMX8MQ_SYS1_PLL_800M]);

 

Supported clock source can also be found from the same file:

static const char *imx8mq_csi1_core_sels[] = {"osc_25m", "sys1_pll_266m", "sys2_pll_250m", "sys1_pll_800m",
           "sys2_pll_1000m", "sys3_pll2_out", "audio_pll2_out", "video_pll1_out", };

The clock tree can be checked with command:

$ cat /sys/kernel/debug/clock/clk_summary

Some examples of clock settings:

  assigned-clocks = <&clk IMX8MQ_CLK_CSI1_CORE_DIV>,
      <&clk IMX8MQ_CLK_CSI1_PHY_REF_DIV>,
      <&clk IMX8MQ_CLK_CSI1_ESC_DIV>;
  assigned-clock-rates = <266000000>, <100000000>, <66000000>;

 

or

  assigned-clocks = <&clk IMX8MQ_CLK_CSI1_CORE_DIV>,
      <&clk IMX8MQ_CLK_CSI1_PHY_REF_DIV>,
      <&clk IMX8MQ_CLK_CSI1_ESC_DIV>;
  assigned-clock-rates = <266000000>, <125000000>, <66000000>;

Best regards
igor
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igorpadykov
NXP TechSupport
NXP TechSupport

Hi DONGOH 

the current CSI core clock is from SYS1_PLL_266M, code is in linux-imx\drivers\clk\imx\clk-imx8mq.c

 clk_set_parent(clks[IMX8MQ_CLK_CSI1_CORE_SRC], clks[IMX8MQ_SYS1_PLL_266M]);
 clk_set_parent(clks[IMX8MQ_CLK_CSI1_PHY_REF_SRC], clks[IMX8MQ_SYS2_PLL_1000M]);
 clk_set_parent(clks[IMX8MQ_CLK_CSI1_ESC_SRC], clks[IMX8MQ_SYS1_PLL_800M]);

 

Supported clock source can also be found from the same file:

static const char *imx8mq_csi1_core_sels[] = {"osc_25m", "sys1_pll_266m", "sys2_pll_250m", "sys1_pll_800m",
           "sys2_pll_1000m", "sys3_pll2_out", "audio_pll2_out", "video_pll1_out", };

The clock tree can be checked with command:

$ cat /sys/kernel/debug/clock/clk_summary

Some examples of clock settings:

  assigned-clocks = <&clk IMX8MQ_CLK_CSI1_CORE_DIV>,
      <&clk IMX8MQ_CLK_CSI1_PHY_REF_DIV>,
      <&clk IMX8MQ_CLK_CSI1_ESC_DIV>;
  assigned-clock-rates = <266000000>, <100000000>, <66000000>;

 

or

  assigned-clocks = <&clk IMX8MQ_CLK_CSI1_CORE_DIV>,
      <&clk IMX8MQ_CLK_CSI1_PHY_REF_DIV>,
      <&clk IMX8MQ_CLK_CSI1_ESC_DIV>;
  assigned-clock-rates = <266000000>, <125000000>, <66000000>;

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------