i.MX7D M4 dynamic resets from A7

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

i.MX7D M4 dynamic resets from A7

579 Views
jtheath
Contributor II

For the M4 demos we load the appropriate .bin files into memory and start the M4 from U-Boot.  We'd like to use the M4 as an intelligent real-time peripheral and will want to dynamically reload it depending on what kind of things we're trying to control or sense.  Is there an application note or working example of such an operation?

I'm studying the DRM and see reference to various M4 reset registers in the System Reset Controller (section 4.2.5 pp 256, Section 6.2.7.4 pp 1023, 1024, 1025).  Perhaps one clears the ENABLE_M4 bit and sets the self-clearing bits SW_M4C_RST & SW_M4P_RST knowing the M4 will clear these once it boots. Also looking to the uboot code as an example.  Is its methodology valid once Linux is running on the A7?

Thank you,   Joe

Labels (2)
0 Kudos
2 Replies

433 Views
igorpadykov
NXP Employee
NXP Employee

Hi Joseph

one can check AN5317 Loading Code on Cortex-M4

http://www.nxp.com/assets/documents/data/en/application-notes/AN5317.pdf 

https://community.freescale.com/thread/351961

>Perhaps one clears the ENABLE_M4 bit and sets the self-clearing bits SW_M4C_RST & SW_M4P_RST knowing the M4 >will clear these once it boots. Also looking to the uboot code as an example.  Is its methodology valid once Linux is running >on the A7?

yes it is valid

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos

433 Views
jtheath
Contributor II

Thank you, Igor.  Much appreciated!

- Joe

0 Kudos