i.MX6QP CLK1_P/N pin spec as input

[torus1000]

Hi,

I'm searching for the input specifications for CLK1_P,CLK1_N,CLK2_P&CLK2_N pins of i.MX6QP.
I couldn't find them in the datasheet. I also checked i.MX community as following.
      https://community.nxp.com/message/360020
      https://community.nxp.com/thread/446350

Does anyone know those value such as VIH, VIL and Tolerance?
Is it LVDS clock level compatible?

Can somebody help me to get them?

[Yuri · Accepted solution]

Hello,

  According to Hardware Development Guide for i.MX6 in Table 2-7 (Oscillator
and clock recommendations:

"CLK1_P/CLK1_N and CLK2_P/CLK2_N are LVDS input/output differential pairs compatible with
TIA/EIA-644 standard. The frequency range is 0 to 600 MHz.
Alternatively, a single-ended signal can be used to drive a CLKx_P input. In this case, the corresponding
CLKx_N input should be tied to a constant voltage level equal to 50% of VDD_HIGH_CAP. Termination
should be provided with high-frequency signals. See the LVDS pad electrical specification in the data
sheet for further details."

http://cache.nxp.com/assets/documents/data/en/user-guides/IMX6DQ6SDLHDG.pdf

Have a great day,
Yuri

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