i.MX53 ENGcm11135.

[satoshishimoda]

Hi community,

Our patner have a question about i.MX53 ENGcm11135.
Pleas see the "WinCE BSP Status" in IMX53CE Rev.5.
It says " System does not perform cache maintenance in non-secure mode".
But they found CSSELR setting in the following WCE700_MX53_ER_1105 source codes.

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platform\common\src\soc\COMMON_FSL_V3\OAL\ARMV7\CACHE\init.s(42):     mcr     p15, 2, r3, C0, C0, 0   ; Write the Cache Size selection register
platform\common\src\soc\COMMON_FSL_V3\OAL\ARMV7\CACHE\init.s(81):     mcr   p15, 2, r3, C0, C0, 0     ; Write the Cache Size selection register
platform\common\src\soc\COMMON_FSL_V3\OAL\ARMV7\CACHE\init.s(116):     mcr   p15, 2, r3, c0, c0, 0     ; Write the Cache Size selection register
platform\common\src\soc\COMMON_FSL_V3\OAL\ARMV7\CACHE\init.s(155):     mcr   p15, 2, r3, c0, c0, 0     ; Write the Cache Size selection register

platform\iMX53_SMD\SRC\OAL\OALLIB\startup.s(833):     mcr     p15, 2, r10, c0, c0, 0  ; Write the Cache Size selection register
=====

I think the above CSSELR setting is executed in secure mode, so it is no problem.
Is this correct?

Best Regards,
Satoshi Shimoda

[Bio_TICFSL · Accepted solution]

Hi Satoshi,

correct!, system should have an active process in secure state, That the reason that init.s includes Write the Cache Size selection register, as published

sequence for cleaning the entire cache, it save the CSSELR and then restore it value, corresponding to the security state the processor is transitioning.

Please take in mind that,  The specified behavior and that can limit or severely impair the intended use of specified features, but does not render the product unusable in all or the majority of applications

Hope this helps

regards