- There appear to be 3 PCIe modules (PCIe0, PCIe1, and PCIe_SATA0). What bus/lane configurations are available? Ex: Can I set up PCIe0 as a single lane bus, and PCIe1 and PCIe_SATA0 as a 2-lane bus?
- These pins appear tied to the PCIe0 and PCIe1 modules respectively, is this true? Or are they only part of the PCIe1 module as called out in table 9-11 of the i.MX 8QM Processor Reference Manual?
- PCIE_CTRL0_WAKE_B
- PCIE_CTRL0_PERST_B
- PCIE_CTRL0_CLKREQ_B
- PCIE_CTRL1_CLKREQ_B
- PCIE_CTRL1_PERST_B
- PCIE_CTRL1_WAKE_B
- Are these wake/perst/clkreq features not available on the PCIe_SATA0 module?
How does one choose between the SATA or PCIe modes of the PCIe_SATA0_RX/TX pins? A particular register setting?
