What are Host1, 2, 3 and OTG2 in IMX_REFERENCE_MANUAL.pdf of imx8mm?

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What are Host1, 2, 3 and OTG2 in IMX_REFERENCE_MANUAL.pdf of imx8mm?

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takeshi100
Contributor III

What are Host1, 2, 3 and OTG2 in IMX_REFERENCE_MANUAL.pdf of imx8mm?

 

applicable parts

• High-speed Host Only core (Host1), high-speed, full speed, and low devices are supported
• High-speed Inter-Chip core (Host2 & Host3)
• High-speed Host Only core (OTG2), high-speed, full speed, and low devices are supported. A USB2Pci bridge
is connected to OTG2 by default. Therefore, users may not be able to connect other USB devices on this port.
• High-speed Inter-Chip core (Host2)

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jimmychan
NXP TechSupport
NXP TechSupport

Hello,

 

There are two USB 2.0 controller cores in this chip:
• Controller Core 0 is also named 'OTG1 Core'; its connected port is named 'OTG1
port'.
• Controller Core 1 is also named 'OTG2 Core'; its connected port is named 'OTG2
port'.

 

For details, please refer to the Chapter 11 in the Reference Manual.

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takeshi100
Contributor III

The imx8mm have nothing to do with Hos1, 2 and 3?

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