we are using i.MX6ULL with fixed power supplies (not PMIC). Datasheet (Table 10, Page 24) claims that VDD_SOC_IN MUST be 125 mV higher than the LDO Outputs.
Difference between VDD_SOC_IN and VDD_ARM/SOC_CAP at upper voltage limit (1.5V vs 1.26V) is larger than 125mV.
Should this difference be understood as exactly 125mV or at least 125mV? If it is exactly, what is the tolerance and how to deal with upper voltage level mismatch?