Run Primary core M7 of iMX8MN from SPL

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Run Primary core M7 of iMX8MN from SPL

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kien0bede
Contributor I

I have referred to the method of starting the iMX8MN primary core M7 from U-boot using a binary file.

=> setenv cm_image cm_TCM_hello_world.bin

3. Set the address where the application will run from (TCM memory in this case).
=> setenv cm_addr 0x7e0000

4. Create a variable that loads the application from eMMC
=> setenv cm_loadimage 'fatload mmc ${mmcdev} ${loadaddr} ${cm_image}'

5. Create a variable that will load and boot the application. It loads the image from eMMC to
DDR memory, copies from DDR memory to TCM memory and then boots the application. The
application is loaded via DDR memory since
fatload in U-boot can only load to memory
regions that aren’t marked as reserved and the TCM memory is considered reserved.
=> setenv cm_boot 'run cm_loadimage; cp.b ${loadaddr} ${cm_addr} ${filesize}; dcache flush; bootaux ${cm_addr}'

6. Save the changes.
=> saveenv

7. Boot the Cortex-M application.
=> run cm_boot

Now I want to run that binary file from SPL because I want to boot the system using Falcon Boot.

Can anyone help me with this?

Thank you, Kien

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JosephAtNXP
NXP TechSupport
NXP TechSupport

Hi,

Thank you for your interest in NXP Semiconductor products,

Due to Cortex-A accelerated boot I think we can set apart SPL work and you could quickly have a reference of Cortex-M firmware-loading and booting in Linux, refer to:

AN5317 Loading Code on Cortex-M from U-Boot/Linux for the i.MX Asymmetric Multi-Processing Applicati....

Regards

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