customer is LGE-CTO
project is IFE (In Flight Entertainment)
silicon : i.MX8MQ
BSP : L5.4.70.
issue : customer met booting failure with suck at "starting kernel ...." log.
customer applied below patch and with ddr_timing.c from ddr stress tool.
with below patch + removed OPTEE ==> 4G booting is okay and also 4G memory seems to be okay on target board.
But, below patch + OPTEE , customer met booting failure with stuck at "starting kernel.."
diff -urN a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts memory@40000000 { pcie0_refclk: pcie0-refclk { |
diff -urN a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig #define CONFIG_SYS_SDRAM_BASE 0x40000000
below is bdinfo with booting failure. i am not sure but does below glue text address is as below. it is for your reference. u-boot=> bdinfo
Could you please check this issue and help me to find any clue? Thank you BRs jessie |
解決済! 解決策の投稿を見る。
We had a way to support 8MQ 4GB memory without changing OPTEE load address.
Please refer to: https://community.nxp.com/t5/iMX-and-Vybrid-Support/8M-Scale-845-850-board-4GB-memory-support-summar...
Hi @kevin_fu :
I don't know what's your exact request, any way I past below for your reference:
ifneq (,$(filter $(PLATFORM_FLAVOR),mx8mqevk))
-CFG_DDR_SIZE ?= 0xc0000000
+CFG_DDR_SIZE ?= 0x100000000
+CFG_TZDRAM_START ?= 0xfe000000
CFG_UART_BASE ?= UART1_BASE
+$(call force,CFG_CORE_LARGE_PHYS_ADDR,y)
+$(call force,CFG_CORE_ARM64_PA_BITS,36)
endif
We had a way to support 8MQ 4GB memory without changing OPTEE load address.
Please refer to: https://community.nxp.com/t5/iMX-and-Vybrid-Support/8M-Scale-845-850-board-4GB-memory-support-summar...
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