# IMX7D, LPDDR3 register setting Query

## IMX7D, LPDDR3 register setting Query

583 次查看
Contributor II

Hi,

We are using IMX7D (MCIMX7D3EVK10SD) in our board along with Kingston LPDDR3 (08EMCP08-EL3DT227-A01U). I'm filling out the (MX7D_LPDDR3_register_programming_aid_v1_4) Register Programming sheet. I have downloaded the Excel sheet in below link,

I have below query in DDRC_ODTCFG register,

1. In downloaded Excel sheet, under register configuration sheet, line item 158 is as below,

 WR_ODT_HOLD 1.25 6 06000000 Note, for LPDDR3, input the value of tDQSS from the DRAM data sheet (in clock cycles), otherwise for DDR3, this will be automatically set to 0x6. Description: Cycles to hold ODT for a write command. The minimum supported value is 2. For DDR3: ■ BL8 - 0x6 ■ BL4 - 0x4 For LPDDR3: ■ RU(tDQSSmax/tCK) + 4 Value After Reset: 0x4

My Query is in line item 158 under LPDDR3 they have mentioned a formula "RU(tDQSSmax/tCK)+4" but in Cell D158 the formula does not use tCK value (=IF(C17="DDR3", 6, ROUNDUP((C158 + 4),0))). Where the formula supposed to be (=IF(C17="DDR3", 6, ROUNDUP((C158/C31 + 4),0))).

Please confirm what value should i use in cell C158 while programming. Should i want to use the value of tDQSS (1.25ns) alone (Resulting Value = 6) or should i want to use correct formula in C158, RU(tDQSS/tCK) which will be "1" (Resulting Value = 5)?

Kindly Confirm.

Thanks,

Logesh

• ### i.MX7Dual

1 回复
363 次查看
NXP Employee

Hi Logesh

according to description in Reference Manual, WR_ODT_HOLD is in tCK cycles,

so seems in C158, RU(tDQSS/tCK) should be used.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------