IMX6ULL UART: Missed DMA callback in high speed transfers

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IMX6ULL UART: Missed DMA callback in high speed transfers

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arnoutdiels
Contributor III

Hello,

We have been running into an issue with the ttymxc (uart) on the IMX6ULL on linux on 1Mbaud communcation.

We had to backport the v5.2 mxc.c serial driver and imx-sdma.c driver to our v4.9 branch to fix a number of issues, but now this works stable.

With the following exception:

- When two 1Mbaud transfers occur very close to each other ( in our case, a transfer of 9 bytes, followed by 100us idle, then 256bytes), the imx_uart_dma_rx_callback is only called once (I checked the icount.rx), and only has the first 9 bytes inside.

- When the same sequence is sent again, we suddenly receive the other 256 bytes + 9 bytes of the next sequence. (the new 256 bytes again are stored in a DMA buffer, but are not flushed out).

For now, we work around this by simply making sure the idle time between transfers > 200us, but this is not ideal.

Is this a known issue? 

Thanks in advance for any feedback.

Kind regards,

Arnout

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Yuri
NXP Employee
NXP Employee

Hello,

  Below are some comments regarding the issue.

1.

   It is recommended to use flow control (RTS/CTS) for UART with DMA  to avoid

data lost.

2.

   DMA transfers data as bursts, containing some minimal (threshold) number of bytes.

Data will be transferred when threshold  is achieved.   


Have a great day,
Yuri

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