IMX6DL - PC does not recognise the IMX6 cpu as USB OTG device

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IMX6DL - PC does not recognise the IMX6 cpu as USB OTG device

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georgiadede
Contributor I

We are using the IMX6U5DVM10ACR and the OTG USB port as device so the MFG tool can be used.

No software loaded and processor input/output supplies and clock look ok.  The connect a USB cable from my PC to the OTG USB port connector (before using the MFG tool). My PC does not recognize the IMX6 CPU as device (expect a new HID device in Win 'device manager'). I have attached the schematic for reference. Please can you take a look and assist? I suppose at that stage the Boot pins configuration settings are not relevant.

Also a couple of questions regarding the microprocessor output (LDOs) supplies.

According to the HW User guide Table 4-1 and Note 1 VDDSOC_CAP & VDDPU_CAP are allowed to be connected together. Is this right as this is the way I have implemented this on my design? I noticed that the SABRE design has these supplies on different rails.

 

Thank you.

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georgiadede
Contributor I

Clock is stable and has been checked. However, I have an issue with the POR_N signal (PMIC to IMX6 CPU reset) . The reset line is asserted and then goes high before (approx. 270us) the VDD_ARM_CAP and VDD_PU_CAP supplies become stable. This violates the power on sequence requirements.  Any suggestion to delay the POR_N signal? I can add a small supervisory device to delay the signal but let me know whether you see a quick solution to this.

Thank you.

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igorpadykov
NXP Employee
NXP Employee

Hi georgiadede

reason may be 24MHz, please check if it is stable, use clock recommendations

given in i.MX6 System Development User’s Guide

http://www.nxp.com/docs/en/user-guide/IMX6DQ6SDLHDG.pdf

Recommended to follow SABRE design VDDSOC_CAP & VDDPU_CAP connections

as linux may turn off VDDPU_CAP in low power modes.

Best regards
igor
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