If I try to set the clock using Linux and the userspace governor, it will accept 528MHz, but anything higher skips to 900MHz:
root@imx6ullevk:/lib/modules# echo 500000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed
root@imx6ullevk:/lib/modules# cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_cur_freq
528000
root@imx6ullevk:/lib/modules# echo 530000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed
root@imx6ullevk:/lib/modules# cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_cur_freq
900000
root@imx6ullevk:/lib/modules# echo 792000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed
root@imx6ullevk:/lib/modules# cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
userspace
root@imx6ullevk:/lib/modules# cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_cur_freq
900000
root@imx6ullevk:/lib/modules# cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq
900000
What do I need to do to set the maximum clock to 792MHz?
root@imx6ullevk:/lib/modules# cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
userspace
Solved! Go to Solution.
I believe you need to check the scaling_available_frequencies to see how many opp the system have.
cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies
you need to type 528000 to set the 528M,which should list in scaling_available_frequencies.
The exact number in scaling_available_frequencies.
And I believe BSP code has problem.
linux/drivers/cpufreq/imx6q-cpufreq.c
/*
* Speed GRADING[1:0] defines the max speed of ARM:
* 2b'00: Reserved;
* 2b'01: 528000000Hz;
* 2b'10: 696000000Hz on i.MX6UL, 792000000Hz on i.MX6ULL;
* 2b'11: 900000000Hz on i.MX6ULL only;
* We need to set the max speed of ARM according to fuse map.
*/
val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
// now the val is 0x3.
//#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
//#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
//val != OCOTP_CFG3_6ULL_SPEED_792MHZ is wrong I believe.
//should be
// if ((val != OCOTP_CFG3_6ULL_SPEED_792MHZ)&&(val != OCOTP_CFG3_6ULL_SPEED_900MH))
if (of_machine_is_compatible("fsl,imx6ull")) {
if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
if (dev_pm_opp_disable(dev, 792000000))
dev_warn(dev, "failed to disable 792MHz OPP\n");
if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
if (dev_pm_opp_disable(dev, 900000000))
dev_warn(dev, "failed to disable 900MHz OPP\n");
}
return ret;
}
Hi,
Please provide your device tree and also the inputs on
cat /sys/devices/system/cpu/cpu0/cpufreq/stats/time_in_state
Thank you
cat /sys/devices/system/cpu/cpu0/cpufreq/stats/time_in_state
198000 0
396000 35418
528000 0
900000 0
Since this is the NXP EVK board, I have made no changes to the device tree.
How do I provide device tree source? I could do a reverse compile.
I am using 5.15.71:
95448dd0dc9b621ae027cbefedaaa7c3d0d3ad2d
(tag: lf-5.15.71-2.2.0, origin/lf-5.15.y
5.15.y imx6ull device tree root
I gzipped the dtb file.
Hi,
I understand that it's working from you created case, please refer to IMX REFERENCE MANUAL page 33.
If the frequency is not defined in DTS, the CPUFREQ driver changes the CPU frequency
to the nearest higher frequency in the array.
The initial clock speed is 528 MHz, then you change it to 530 MHz, the nearest defined frequency is 900 Mhz, same for the other command.
What is really concerning is your reply, it doesn't get back to 528MHz.
To set the clock to 792 MHz you have to set up that option in the device tree, see the next example.
Thank you
It appears that 792000 is already defined in device tree in cpu0.
Here is the live device tree for imx6ull-14x14-evk:
root@imx6ullevk:/proc/device-tree/cpus/cpu@0# xxd -g4 fsl,soc-operating-points
00000000: 000dbba0 001312d0 000c15c0 0011edd8 ................
00000010: 00080e80 0011edd8 00060ae0 0011edd8 ................
00000020: 00030570 0011edd8 ...p....
root@imx6ullevk:/proc/device-tree/cpus/cpu@0# xxd -g4 operating-points
00000000: 000dbba0 00137478 000c15c0 0012b128 ......tx.......(
00000010: 00080e80 0011edd8 00060ae0 000fa3e8 ................
00000020: 00030570 000e7ef0 ...p..~.
0x000c15c0 = 792000
0x0011edd8 = 1175000
0x0012b128 = 1225000
Should I delete all the other operating points except 792000?
Additional information:
root@imx6ullevk:/sys/devices/system/cpu/cpufreq/policy0# echo 792000 >scaling_max_freq
root@imx6ullevk:/sys/devices/system/cpu/cpufreq/policy0# cat scaling_max_freq
528000
Now it won't even set the 528MHz:
root@imx6ullevk:/lib/modules# echo 500000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed
root@imx6ullevk:/lib/modules# cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq
900000
root@imx6ullevk:/lib/modules# cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor
userspace
So is something setting the clock speed for me?
I believe you need to check the scaling_available_frequencies to see how many opp the system have.
cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies
you need to type 528000 to set the 528M,which should list in scaling_available_frequencies.
The exact number in scaling_available_frequencies.
And I believe BSP code has problem.
linux/drivers/cpufreq/imx6q-cpufreq.c
/*
* Speed GRADING[1:0] defines the max speed of ARM:
* 2b'00: Reserved;
* 2b'01: 528000000Hz;
* 2b'10: 696000000Hz on i.MX6UL, 792000000Hz on i.MX6ULL;
* 2b'11: 900000000Hz on i.MX6ULL only;
* We need to set the max speed of ARM according to fuse map.
*/
val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
// now the val is 0x3.
//#define OCOTP_CFG3_6ULL_SPEED_792MHZ 0x2
//#define OCOTP_CFG3_6ULL_SPEED_900MHZ 0x3
//val != OCOTP_CFG3_6ULL_SPEED_792MHZ is wrong I believe.
//should be
// if ((val != OCOTP_CFG3_6ULL_SPEED_792MHZ)&&(val != OCOTP_CFG3_6ULL_SPEED_900MH))
if (of_machine_is_compatible("fsl,imx6ull")) {
if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
if (dev_pm_opp_disable(dev, 792000000))
dev_warn(dev, "failed to disable 792MHz OPP\n");
if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
if (dev_pm_opp_disable(dev, 900000000))
dev_warn(dev, "failed to disable 900MHz OPP\n");
}
return ret;
}