hello,Community
The Dumb PMIC mode is assumed, and I am planning to connect the PMIC_ON_REQ terminal on the i.MX 7Dual side and the terminal that powers on / off in the level state on the PMIC side.
After applying a voltage to the VDD_SNVS_IN pin, will it start in Smart PMIC mode during Power on sequence (because it was described as “0” at RESET)?
The level signal is expected as the PMIC_ON_REQ signal.
However, does it have to be able to start with a pulse to start up in Smart PMIC mode?
Or, if you have a way or procedure to start with a level instead of a pulse, please let me know.
best regards
Goto
Solved! Go to Solution.
>is Dumb PMIC enabled even if DP_EN in SNVS_LP Control Register is not set to "1"?
yes, DP_EN has not effect.
for TOP bit usage one can check patch on https://community.nxp.com/docs/DOC-339779
Best regards
igor
hello,
If the answer below is correct,
is Dumb PMIC enabled even if DP_EN in SNVS_LP Control Register is not set to "1"?
Is the TOP value valid even if DP_EN is not set to "1"?
Answer excerpt
i.MX7D supports only dumb mode, also there are no options to reconfigure behavior of PMIC_ON_REQ signal.
best regards
Goto
>is Dumb PMIC enabled even if DP_EN in SNVS_LP Control Register is not set to "1"?
yes, DP_EN has not effect.
for TOP bit usage one can check patch on https://community.nxp.com/docs/DOC-339779
Best regards
igor
Hi Goto
i.MX7D supports only dumb mode, also there are no options
to reconfigure behaviour of PMIC_ON_REQ signal. For connections
PMIC_ON_REQ signal recommended to follow i.MX7D Sabre SD design
Best regards
igor
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