How to make GPIO pin default as Active High in i.MX6UL dts source

[Poornesh7]

Greetings !

We have designed custom carrier board using i.MX6UL SoC . In the custom board,
GPIO‘s are used for relay purpose . Here we need the GPIO pins to be in  Active High as default. Please suggest us the procedure to enable the GPIO pins in Active High state as default  in  dts source .

As below we have enabled the GPIO pins

--------------------------------------------------------------------------------------------------------------------------------------

pinctrl_gpio4: gpio4 {
fsl,pins = <
          MX6UL_PAD_CSI_MCLK__GPIO4_IO17       0x70a1
          MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18    0x70a1
          MX6UL_PAD_CSI_VSYNC__GPIO4_IO19    0x70a1
          MX6UL_PAD_CSI_HSYNC__GPIO4_IO20    0x70a1
          MX6UL_PAD_CSI_DATA00__GPIO4_IO21   0x70a1
          MX6UL_PAD_CSI_DATA01__GPIO4_IO22   0x70a1
          MX6UL_PAD_CSI_DATA02__GPIO4_IO23   0x70a1
          MX6UL_PAD_CSI_DATA03__GPIO4_IO24   0x70a1
          MX6UL_PAD_CSI_DATA04__GPIO4_IO25   0x70a1
          MX6UL_PAD_CSI_DATA05__GPIO4_IO26   0x70a1
          MX6UL_PAD_CSI_DATA06__GPIO4_IO27   0x70a1
          MX6UL_PAD_CSI_DATA07__GPIO4_IO28   0x70a1
          MX6UL_PAD_NAND_WP_B__GPIO4_IO11  0x70a1
  >;
};

------------------------------------------------------------------------------------------------------------------------------------

Thanks in advance

[Poornesh7]

I'd also like to know the procedure to set the all the GPIOs available on the IMX.6UL to a default low state. 

The Application running on the processor has variable loads connected to the GPIOs via relays, The Power supplied to those loads aren't sufficient if all the loads get turned on while we are booting up the processor. Hence, we need the GPIOs to be in LOW state while we boot the device. Please suggest a way to do the same.

Information on how to calculate these values '0xf0a1 / 0x70a1' would be highly appreciated.

Thanks in advance,
Poornesh

[kef2]

See your iMX7ULL Reference Manual

https://www.nxp.com/webapp/Download?colCode=IMX6ULLRM

Look for specific PAD Control Register. Most of these pad control register have the same fields, but there are as well some differences. For example 

[kef2 · Accepted solution]

You already made the pins high with pull up enable (PUE=1 PKE=1 PUS > 0). 0xf0a1 instead of 0x70a1 would make pull up stronger (22k vs 47k).

There's a way to force pin high/low in output mode, but then you won't be able to use such pins neither with ligpiod or sysfs gpio:

&gpio1 {
	some_pin_as_output {
		gpio-hog;
		gpios = <15 0>; /* 15th bit of gpio */
		output-high; /* or output-low */
	};
};

With this gpioinfo will report pin as used and so not available.

[Poornesh7]

Thanks for your clear information !