How to integrate WM8525 for iMX8MP?

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

How to integrate WM8525 for iMX8MP?

ソリューションへジャンプ
706件の閲覧回数
trongthinh
Contributor IV

I have added the following sections to the device tree:

 

 

	wm8524: wm8524 {
		#sound-dai-cells = <0>;
		compatible = "wlf,wm8524";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_wlf>;
		wlf,mute-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
		clocks = <&clk IMX8MP_CLK_SAI3_ROOT>;
		clock-names = "mclk";
		status = "okay";
	};

	sound-wm8524 {
		compatible = "fsl,imx-audio-wm8524";
		model = "wm8524-audio";
		audio-cpu = <&sai3>;
		audio-codec = <&wm8524>;
		audio-asrc=<&easrc>;
		audio-routing =
			"Line Out Jack", "LINEVOUTL",
			"Line Out Jack", "LINEVOUTR";
	};

 

 

 

and I have edited node sai3 and easrc as follows

 

 

&easrc {
	#sound-dai-cells = <0>;
	fsl,asrc-rate  = <48000>;
	status = "okay";
};

&sai3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai3>;
	assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <24576000>;
	fsl,sai-mclk-direction-output;
	status = "okay";
};

 

 

 

The results I get when I run command $ aplay -l

 

 

 

**** List of PLAYBACK Hardware Devices ****
card 0: wm8524audio [wm8524-audio], device 0: HiFi wm8524-hifi-0 [HiFi wm8524-hifi-0]
  Subdevices: 1/1
  Subdevice #0: subdevice #0
card 0: wm8524audio [wm8524-audio], device 1: HiFi-ASRC-FE (*) []
  Subdevices: 1/1
  Subdevice #0: subdevice #0

 

 

 

I think the system has recognized the audio card and can play the audio file. I tested it with command speaker test.
$ speaker-test -c 2 -t sine
The speaker does not emit clear sound, it is very noisy, I cannot even hear the 440Hz frequency that the above command creates. there was only squeaking sound.

I used an osciloscope to check the signal at the MCLK and BCLK pins, and I saw that the measured frequency at the MCLK pin was equal to the frequency I set in the device tree (24676khz), and the frequency at the BLCK pin = sample rate * 64, in this case 3072000 Hz (sample rate = 48 khz). I also checked the LRCLK pin frequency, the measured result was 48 khz.

I don't know if the above results are correct? Can you explain me how to calculate MCLK, BCLK, LRCLK for WM8524?

 
ラベル(1)
0 件の賞賛
返信
1 解決策
671件の閲覧回数
Sanket_Parekh
NXP TechSupport
NXP TechSupport

Hi @trongthinh,

I hope you are doing well.
 
The MCLK, BITCLOCK and LRCLK must be synchronous to each other. Otherwise you will get lots of noise, clicks or no audio at all. As you have mentioned that you are getting the  frequency at the MCLK pin which is equal to the frequency you set in the device tree. The device supports all common audio sampling rates between 8kHz and 192kHz using common MCLK fs rates, with a slave mode audio interface. Bitclock is generated by MCLK: I2S0_RCR2 = I2S_RCR2_SYNC(1) | I2S_TCR2_BCP | I2S_RCR2_MSEL(1)| I2S_RCR2_BCD | I2S_RCR2_DIV(1);
Also, BCLK = samplerate * bits per channel * number of channels
To get the BitClock up to a higher frequency you will need to run in TDM8 mode even though you only need two channels. You will also need to set it up with 32 bitclock per channel slot width to again, get the bitclock higher. So this means you will have 8 channel slots per audio frame and 32 bits within each channel. So the BitClock frequency MUST be exactly 256 x LRCLK. For better understanding in detail, go through this link: https://ez.analog.com/audio/f/q-a/3356/ssm2518-codec-bclk-used-as-mclk. The source code is available here: https://coral.googlesource.com/linux-imx/+/refs/tags/4-2/sound/soc/fsl/imx-wm8524.c. Somehow you may find the similar conversation solved over here: https://community.nxp.com/t5/i-MX-Processors/imx8mm-mute-unmute-audio-output-with-wm8524/m-p/1410875. And the Datasheet with the tested characteristics of WM8524: https://www.mouser.com/datasheet/2/76/WM8524_v4.1-532368.pdf
 
Thanks & Regards,
Sanket Parekh

元の投稿で解決策を見る

0 件の賞賛
返信
1 返信
672件の閲覧回数
Sanket_Parekh
NXP TechSupport
NXP TechSupport

Hi @trongthinh,

I hope you are doing well.
 
The MCLK, BITCLOCK and LRCLK must be synchronous to each other. Otherwise you will get lots of noise, clicks or no audio at all. As you have mentioned that you are getting the  frequency at the MCLK pin which is equal to the frequency you set in the device tree. The device supports all common audio sampling rates between 8kHz and 192kHz using common MCLK fs rates, with a slave mode audio interface. Bitclock is generated by MCLK: I2S0_RCR2 = I2S_RCR2_SYNC(1) | I2S_TCR2_BCP | I2S_RCR2_MSEL(1)| I2S_RCR2_BCD | I2S_RCR2_DIV(1);
Also, BCLK = samplerate * bits per channel * number of channels
To get the BitClock up to a higher frequency you will need to run in TDM8 mode even though you only need two channels. You will also need to set it up with 32 bitclock per channel slot width to again, get the bitclock higher. So this means you will have 8 channel slots per audio frame and 32 bits within each channel. So the BitClock frequency MUST be exactly 256 x LRCLK. For better understanding in detail, go through this link: https://ez.analog.com/audio/f/q-a/3356/ssm2518-codec-bclk-used-as-mclk. The source code is available here: https://coral.googlesource.com/linux-imx/+/refs/tags/4-2/sound/soc/fsl/imx-wm8524.c. Somehow you may find the similar conversation solved over here: https://community.nxp.com/t5/i-MX-Processors/imx8mm-mute-unmute-audio-output-with-wm8524/m-p/1410875. And the Datasheet with the tested characteristics of WM8524: https://www.mouser.com/datasheet/2/76/WM8524_v4.1-532368.pdf
 
Thanks & Regards,
Sanket Parekh
0 件の賞賛
返信