Fail to buring FW to external flash for RT595 EVK borad via LPC_Link2

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Fail to buring FW to external flash for RT595 EVK borad via LPC_Link2

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Dave_SU
Contributor III

Test  Environment:

HW: EVK-MIMXRT595

FW: SDK_2_11_0_EVK-MIMXRT595

ISP[0:2] config: b'110

Description:

When I set ISP[0:2] to b'110, I cannot buring FW to RT595 EVK board.via LPC-Link2. But when I change ISP[0:2] to b'111,  FW can burned success. Under this condition, the FW cannot bootup. and then I change the ISP[0:2] to 110, the FW can bootup.

burning fail log show as below:

J-Link>loadfile sdk20-app.bin 0x08000000
Downloading file [sdk20-app.bin]...

****** Error: Failed to prepare RAMCode using RAM
Error while determining flash info (Bank @ 0x08000000)
Unspecified error -1

Looking forward to reply.

 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @Dave_SU ,

  Please also check the IDE->windows->preferences, make sure it is selecting your JLINK driver JLINKGDBServer.exe

kerryzhou_0-1646795459177.png

 

Best Regards,

Kerry

 

View solution in original post

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @Dave_SU ,

  Please also check the IDE->windows->preferences, make sure it is selecting your JLINK driver JLINKGDBServer.exe

kerryzhou_0-1646795459177.png

 

Best Regards,

Kerry

 

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Dave_SU
Contributor III

Hi kerryzhou

Thank you for all the reply. The issue has been resolved.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @Dave_SU ,

   Thank you for your interest in the NXP MIMXRT product, I would like to provide service for you.

   The MIMXRT595-EVK already have the on board debugger, why you use the LPC-LINK2?

   Do you mean the LPC-LINK2 is the external LPC-LINK2?  

   If you use the MIMXRT595-EVK, please use the on board debugger directly.

This is my on board MIMXRT595-EVK CMSIS DAP debug result:

kerryzhou_0-1646276064817.png

Please note, you need to use the SW7[1:3]=110, I mean, OFF, OFF, ON.

kerryzhou_1-1646276331227.png

 

This will boot from the flexSPI.

Please use my method test it again.

Best Regards,

Kerry

 

 

 

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Dave_SU
Contributor III

Hi @herryzhou

Thank you for your reply.

The LPC-LINK2 on my board was damaged, so I used an external LPC-LINK2 to connect to 'J2' of the EVK to burn the FW.

The result I expect is to keep SW7[1:3] unchanged(keep cfg with '110'), so that firmware burning and booting can be achieved.

Compile environment  --- ARM GCC

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @Dave_SU ,

   I also use the external LPC-LINK2 with CMSIS DAP firmware, the MCUXPresso IDE also works, you can try the MCUXpresso IDE project on your side, just like me:

MIMXRT595-EVK_LPC-LINK2.jpg

kerryzhou_0-1646294639512.png

Wish it helps you!

Best Regards,

Kerry

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Dave_SU
Contributor III

hi @kerryzhou 

Thanks for your verification,
Because when we burn the FW in the factory, there is no IDE environment, so we can only burn bin files to external flash through jlink_cmd. So I pay more attention to the burning method of the command line.

 

Could you provide me with support in this regard.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @Dave_SU ,

   Hardware still the same, use the external LPC-LINK2, just modify the LPC-LINK2 from CMSIS DAP to JLINK, please use the LPCscrypt to change it:

https://www.nxp.com/design/microcontrollers-developer-resources/lpcscrypt-v2-1-2:LPCSCRYPT?tid=vanLP...

Update the JLINK firmware is very important:

https://www.segger.com/products/debug-probes/j-link/models/other-j-links/lpc-link-2/

After you get the Jlink firmware, then you can use the JLINK commander download the code, this is my JLINK commander test log:

kerryzhou_0-1646362994823.png

You also can try my attached .bin file, put it to your JLINK driver install path:

kerryzhou_1-1646363022330.png

After the JLINK download, the led code is working, you can press the SW2 to toggle the RGB LED.

 

Wish it helps you!

Best Regards,

Kerry

 

 

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Dave_SU
Contributor III

It's so amazing. You can do that, I cannot do.

However, I found that executing the jlink command as follows can solve my problem.

exec_jlink_script  flash_firmware_all.jlink(Executed in cmd window, flash script files shown as  attachment)

 

 

 

 

 

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Dave_SU
Contributor III

Hi @kerryzhou 

I can get the same error when I use the MCUXpresso IDE

Dave_SU_0-1646724937145.png

 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @Dave_SU ,

  So, you means, JLINK command works OK, but MCUXPresso IDE can't work?

   If yes, use the JLINK command download my previous attached evkmimxrt595_gpio_led_output.bin at first, then check the app function, whether the led can blinking by click the SW, then try to use the mcuxpresso IDE to debug the evkmimxrt595_gpio_led_output project again, whether you still have issues?

 

Best Regards,

Kerry

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Dave_SU
Contributor III

Hi @kerryzhou @jay_heng 

I used the JLINK command download evkmimxrt595_gpio_led_output.bin successed, the led can blinking by click the SW, then try to use the mcuxpresso IDE to debug the evkmimxrt595_gpio_led_output project again, I still have the issues.

Error code shown as below PIC:

Dave_SU_0-1646793863503.png

Jlink cmd sequence:

exitonerror 1
r
w4 0x40130180 0x06
r
go
loadfile "sdk20-app.bin" 0x08000000
w4 0x40130180 0x00
r
go
exit

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @Dave_SU ,   

   This is my test result with the MIMXRT595-EVK and the LPC-LINK2 board:

kerryzhou_0-1646795082337.png

You can see the JLINK firmware works OK.

This is my log:

[09-3-2022 11:02:52] Executing Server: "C:\Program Files\SEGGER\JLINKV760\JLinkGDBServerCL.exe" -nosilent -swoport 2332 -select USB=611000000  -telnetport 2333 -singlerun -endian little -noir -speed auto   -port 2331    -vd -device MIMXRT595S_M33 -if SWD -halt -reportuseraction
SEGGER J-Link GDB Server V7.60d Command Line Version

JLinkARM.dll V7.60d (DLL compiled Jan 17 2022 13:14:38)

Command line: -nosilent -swoport 2332 -select USB=611000000 -telnetport 2333 -singlerun -endian little -noir -speed auto -port 2331 -vd -device MIMXRT595S_M33 -if SWD -halt -reportuseraction
-----GDB Server start settings-----
GDBInit file:                  none
GDB Server Listening port:     2331
SWO raw output listening port: 2332
Terminal I/O port:             2333
Accept remote connection:      localhost only
Generate logfile:              off
Verify download:               on
Init regs on start:            off
Silent mode:                   off
Single run mode:               on
Target connection timeout:     0 ms
------J-Link related settings------
J-Link Host interface:         USB
J-Link script:                 none
J-Link settings file:          none
------Target related settings------
Target device:                 MIMXRT595S_M33
Target interface:              SWD
Target interface speed:        auto
Target endian:                 little

Connecting to J-Link...
J-Link is connected.
Device "MIMXRT595S_M33" selected.
Firmware: J-Link LPC-Link 2 compiled Aug 23 2021 09:31:25
Hardware: V1.00
S/N: 611000000
Checking target voltage...
Target voltage: 3.30 V
Listening on TCP/IP port 2331
Connecting to target...
InitTarget() start
InitTarget() end
$$UserActionStart$$: Terms of use
$$UserActionEnd$$: Terms of use
Found SW-DP with ID 0x6BA02477
DPIDR: 0x6BA02477
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x84770001)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FE000
CPUID register: 0x410FD213. Implementer code: 0x41 (ARM)
Feature set: Mainline
Found Cortex-M33 r0p3, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
Security extension: implemented
Secure debug: enabled
CoreSight components:
ROMTbl[0] @ E00FE000
[0][0]: E00FF000 CID B105100D PID 000BB4C9 ROM Table
ROMTbl[1] @ E00FF000
[1][0]: E000E000 CID B105900D PID 000BBD21 DEVARCH 47702A04 DEVTYPE 00 Cortex-M33
[1][1]: E0001000 CID B105900D PID 000BBD21 DEVARCH 47701A02 DEVTYPE 00 DWT
[1][2]: E0002000 CID B105900D PID 000BBD21 DEVARCH 47701A03 DEVTYPE 00 FPB
[1][3]: E0000000 CID B105900D PID 000BBD21 DEVARCH 47701A01 DEVTYPE 43 ITM
[1][5]: E0041000 CID B105900D PID 002BBD21 DEVARCH 47724A13 DEVTYPE 13 ETM
[1][6]: E0042000 CID B105900D PID 000BBD21 DEVARCH 47701A14 DEVTYPE 14 CSS600-CTI
[0][1]: E0040000 CID B105900D PID 000BBD21 DEVARCH 00000000 DEVTYPE 11 Cortex-M33
InitTarget() start
InitTarget() end
Found SW-DP with ID 0x6BA02477
DPIDR: 0x6BA02477
CoreSight SoC-400 or earlier
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FE000
CPUID register: 0x410FD213. Implementer code: 0x41 (ARM)
Feature set: Mainline
Found Cortex-M33 r0p3, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
Security extension: implemented
Secure debug: enabled
CoreSight components:
ROMTbl[0] @ E00FE000
[0][0]: E00FF000 CID B105100D PID 000BB4C9 ROM Table
ROMTbl[1] @ E00FF000
[1][0]: E000E000 CID B105900D PID 000BBD21 DEVARCH 47702A04 DEVTYPE 00 Cortex-M33
[1][1]: E0001000 CID B105900D PID 000BBD21 DEVARCH 47701A02 DEVTYPE 00 DWT
[1][2]: E0002000 CID B105900D PID 000BBD21 DEVARCH 47701A03 DEVTYPE 00 FPB
[1][3]: E0000000 CID B105900D PID 000BBD21 DEVARCH 47701A01 DEVTYPE 43 ITM
[1][5]: E0041000 CID B105900D PID 002BBD21 DEVARCH 47724A13 DEVTYPE 13 ETM
[1][6]: E0042000 CID B105900D PID 000BBD21 DEVARCH 47701A14 DEVTYPE 14 CSS600-CTI
[0][1]: E0040000 CID B105900D PID 000BBD21 DEVARCH 00000000 DEVTYPE 11 Cortex-M33
Connected to target
Waiting for GDB connection...Connected to 127.0.0.1
Reading all registers
Connected to 127.0.0.1
Reading all registers
Read 4 bytes @ address 0x080017E4 (Data = 0x681B4B05)
Read 4 bytes @ address 0x08001952 (Data = 0x5404E7A9)
Reading 64 bytes @ address 0x204FFFC0
Read 4 bytes @ address 0x080017E4 (Data = 0x681B4B05)
Read 4 bytes @ address 0x08001952 (Data = 0x5404E7A9)
Reading 64 bytes @ address 0x204FFFC0
Received monitor command: reset
ResetTarget() start
Reset via SYSRESETREQ and reset pin + halt after bootloader
ResetTarget() end
Resetting target
Downloading 4096 bytes @ address 0x08000000 - Verified OK
Downloading 16080 bytes @ address 0x08001000 - Verified OK
Downloading 4020 bytes @ address 0x08004ED0 - Verified OK
Downloading 5884 bytes @ address 0x08005E84 - Verified OK
J-Link: Flash download: Bank 0 @ 0x08000000: Skipped. Contents already match
Writing register (PC = 0x 8001190)
Read 4 bytes @ address 0x08001190 (Data = 0x4B13B672)
Read 4 bytes @ address 0x08001190 (Data = 0x4B13B672)
Reading all registers
Read 4 bytes @ address 0x08001190 (Data = 0x4B13B672)
Reading 64 bytes @ address 0x08001800
Read 2 bytes @ address 0x08001806 (Data = 0x2300)
Received monitor command: semihosting enable
Semi-hosting enabled (Handle on BKPT)
Received monitor command: exec SetRestartOnClose=1
Executed SetRestartOnClose=1
Received monitor command: reset
ResetTarget() start
Reset via SYSRESETREQ and reset pin + halt after bootloader
ResetTarget() end
Resetting target
Setting breakpoint @ address 0x08001806, Size = 2, BPHandle = 0x0001
Starting target CPU...
...Breakpoint reached @ address 0x08001806
Reading all registers
Removing breakpoint @ address 0x08001806, Size = 2
Read 4 bytes @ address 0x08001806 (Data = 0x607B2300)
Reading 64 bytes @ address 0x204FFFC0
Read 4 bytes @ address 0xE00FE000 (Data = 0x00001003)
Read 4 bytes @ address 0xE00FFFF4 (Data = 0x00000010)
Read 4 bytes @ address 0xE00FE004 (Data = 0xFFF42003)
Read 4 bytes @ address 0xE0040FF4 (Data = 0x00000090)
Read 4 bytes @ address 0xE00FE008 (Data = 0x1FF02002)
Read 4 bytes @ address 0xE00FE00C (Data = 0x1FF02002)
Read 4 bytes @ address 0xE00FE010 (Data = 0x00000000)
Read 4 bytes @ address 0xE00FF000 (Data = 0xFFF0F003)
Read 4 bytes @ address 0xE0040FE0 (Data = 0x00000021)
Read 4 bytes @ address 0xE0040FE4 (Data = 0x000000BD)
Read 4 bytes @ address 0xE0040FE8 (Data = 0x0000000B)
Read 4 bytes @ address 0xE0040FEC (Data = 0x00000000)
Read 4 bytes @ address 0xE0040FD0 (Data = 0x00000004)
Read 4 bytes @ address 0xE0040FBC (Data = 0x00000000)
Read 4 bytes @ address 0xE0040FCC (Data = 0x00000011)
Read 4 bytes @ address 0xE000EFF4 (Data = 0x00000090)
Read 4 bytes @ address 0xE00FF004 (Data = 0xFFF02003)
Read 4 bytes @ address 0xE0001FF4 (Data = 0x00000090)
Read 4 bytes @ address 0xE00FF008 (Data = 0xFFF03003)
Read 4 bytes @ address 0xE0002FF4 (Data = 0x00000090)
Read 4 bytes @ address 0xE00FF00C (Data = 0xFFF01003)
Read 4 bytes @ address 0xE0000FF4 (Data = 0x00000090)
Read 4 bytes @ address 0xE00FF010 (Data = 0xFFF41002)
Read 4 bytes @ address 0xE00FF014 (Data = 0xFFF42003)
Read 4 bytes @ address 0xE0041FF4 (Data = 0x00000090)
Read 4 bytes @ address 0xE00FF018 (Data = 0xFFF43003)
Read 4 bytes @ address 0xE0042FF4 (Data = 0x00000090)
Read 4 bytes @ address 0xE00FF01C (Data = 0xFFF44002)
Read 4 bytes @ address 0xE00FF020 (Data = 0x00000000)
Read 4 bytes @ address 0xE000EFE0 (Data = 0x00000021)
Read 4 bytes @ address 0xE000EFE4 (Data = 0x000000BD)
Read 4 bytes @ address 0xE000EFE8 (Data = 0x0000000B)
Read 4 bytes @ address 0xE000EFEC (Data = 0x00000000)
Read 4 bytes @ address 0xE000EFD0 (Data = 0x00000004)
Read 4 bytes @ address 0xE000EFBC (Data = 0x47702A04)
Read 4 bytes @ address 0xE000EFCC (Data = 0x00000000)
Read 4 bytes @ address 0xE0001FE0 (Data = 0x00000021)
Read 4 bytes @ address 0xE0001FE4 (Data = 0x000000BD)
Read 4 bytes @ address 0xE0001FE8 (Data = 0x0000000B)
Read 4 bytes @ address 0xE0001FEC (Data = 0x00000000)
Read 4 bytes @ address 0xE0001FD0 (Data = 0x00000004)
Read 4 bytes @ address 0xE0001FBC (Data = 0x47701A02)
Read 4 bytes @ address 0xE0001FCC (Data = 0x00000000)
Read 4 bytes @ address 0xE0002FE0 (Data = 0x00000021)
Read 4 bytes @ address 0xE0002FE4 (Data = 0x000000BD)
Read 4 bytes @ address 0xE0002FE8 (Data = 0x0000000B)
Read 4 bytes @ address 0xE0002FEC (Data = 0x00000000)
Read 4 bytes @ address 0xE0002FD0 (Data = 0x00000004)
Read 4 bytes @ address 0xE0002FBC (Data = 0x47701A03)
Read 4 bytes @ address 0xE0002FCC (Data = 0x00000000)
Read 4 bytes @ address 0xE0000FE0 (Data = 0x00000021)
Read 4 bytes @ address 0xE0000FE4 (Data = 0x000000BD)
Read 4 bytes @ address 0xE0000FE8 (Data = 0x0000000B)
Read 4 bytes @ address 0xE0000FEC (Data = 0x00000000)
Read 4 bytes @ address 0xE0000FD0 (Data = 0x00000004)
Read 4 bytes @ address 0xE0000FBC (Data = 0x47701A01)
Read 4 bytes @ address 0xE0000FCC (Data = 0x00000043)
Read 4 bytes @ address 0xE0041FE0 (Data = 0x00000021)
Read 4 bytes @ address 0xE0041FE4 (Data = 0x000000BD)
Read 4 bytes @ address 0xE0041FE8 (Data = 0x0000002B)
Read 4 bytes @ address 0xE0041FEC (Data = 0x00000000)
Read 4 bytes @ address 0xE0041FD0 (Data = 0x00000004)
Read 4 bytes @ address 0xE0041FBC (Data = 0x47724A13)
Read 4 bytes @ address 0xE0041FCC (Data = 0x00000013)
Read 4 bytes @ address 0xE0042FE0 (Data = 0x00000021)
Read 4 bytes @ address 0xE0042FE4 (Data = 0x000000BD)
Read 4 bytes @ address 0xE0042FE8 (Data = 0x0000000B)
Read 4 bytes @ address 0xE0042FEC (Data = 0x00000000)
Read 4 bytes @ address 0xE0042FD0 (Data = 0x00000004)
Read 4 bytes @ address 0xE0042FBC (Data = 0x47701A14)
Read 4 bytes @ address 0xE0042FCC (Data = 0x00000014)
Reading 64 bytes @ address 0x08001800
Reading 64 bytes @ address 0x08001840
Reading 64 bytes @ address 0x08001880
Starting target CPU...
Debugger requested to halt target...
...Target halted (PC = 0x080017E4)
Reading all registers
Read 4 bytes @ address 0x080017E4 (Data = 0x681B4B05)
Read 4 bytes @ address 0x08001952 (Data = 0x5404E7A9)
Reading 64 bytes @ address 0x204FFFC0
Reading 64 bytes @ address 0x080017C0
Reading 64 bytes @ address 0x08001800

 

JLINK driver version: V7.60d

MCUXpresso IDE version:MCUXpresso IDE v11.5.0 [Build 7232] [2022-01-11]

SDK version:SDK_2_11_0_EVK-MIMXRT595

About the JLINK commander, I didn't write your 0x40130180, you can see my previous log:

RT595_LPC-LINK2 JLINK.png

 

Just connect, erase and loadfile.

Best Regards,

Kerry

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Dave_SU
Contributor III

Hi @kerryzhou 

Thanks for your verification.

On myside, I can burn and debug(online) FW about MCUXpresso IDE project via CMSIS DAP. However, I just can debugging FW about MCUXpresso IDE project via LPC-Link(jlink tool) and cannot burn FW via LPC-Link(jlink tool). 

Because when we burn the FW in the factory, there is no IDE environment. So can you provide me a way how to burn the firmware via CMSIS DAP in command line window?

Note: In factory, ISP[0:2] is set '110' by HW design

 

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @Dave_SU ,

   Thanks for your information.

    To the CMSIS DAP debugger, until now, we are associated with the IDE to download code, I still has no command line.

   In the previous reply, you told me you already can use the JLINK command to download the code successfully, and in the factory, you don't need the IDE, why you don't use the JLINK command to download code in internal boot mode? Or you even still have LPC-LINK2 with JLINK firmware and JLINK command download?

   If yes, do you try the same JLINK driver version  V7.60d? As I can use it download code. I also use the LPC-LINK2 with JLINK firmware.

 

Best Regards,

Kerry

 

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Dave_SU
Contributor III

Hi @kerryzhou 

  Yes, jlink command can resolve the issue. But I am not very clear, why it is necessary to write 0x06 to the 0x40130180 register before the loadfile command to burn the FW into the external flash via jlink.

  My understanding is that after the connection between jlink and the target is established, the FW can be directly burned into the external flash through the 'loadfile' command.

Jlink cmd sequence:

exitonerror 1
r
w4 0x40130180 0x06
r
go
loadfile "sdk20-app.bin" 0x08000000
w4 0x40130180 0x00
r
go
exit

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Dave_SU
Contributor III

Hi Jay,

Thank you for your reply.
My hardware design is fixed, so I don't want to change the ISP's configuration, is there a way to burn the firmware through LPC-link?

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jay_heng
NXP Employee
NXP Employee

ISP[0:2] - b'110, FLEXSPI Boot mode, the MCU status depends on image running result in Flash, it is uncertain .

ISP[0:2] - b'111, Serial download mode, the MCU is in one certain status.

LPC-Link2 debugger takes use of ram-flashloader (pre-load) to download image, and the ram-flashloader may effected by MCU status