Enhanced buffer descriptors for iMX6Q

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Enhanced buffer descriptors for iMX6Q

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michaeledgar
Contributor I

Can anyone point me to a description of the Enhanced Buffer Descriptors for the Ethernet Controller on an iMX6Q?  Section 23.6.14 of the reference manual is missing (i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 2, 06/2014).  The reference manual for the Solo has a description of the legacy buffers, but not the enhanced.

Side question: We are developing a system sans Linux (uCOS) and are having a few issues surrounding errata ERR004512.  Does anyone knows of a handy app note or reference for the settings of the RX FIFO levels/pause frame configurations?

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igorpadykov
NXP Employee
NXP Employee

Hi Michael

please look at attached part of older evision of RM with

description of enhanced buffer descriptors.

Best regards

igor

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michaeledgar
Contributor I

Thank you for the information.

And as for the issues surrounding errata ERR004512, it turned out to be the switch we were connected to did have have Flow Control enabled.  Enabling flow control on the iMX and the switch solve the macerror count (FIFO overrun) from occuring.

544 Views
igorpadykov
NXP Employee
NXP Employee

Hi Michael

please look at attached part of older evision of RM with

description of enhanced buffer descriptors.

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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