Hello, Community.
Recently, I'm trying to interface a Trully LCD. It's a 240x320(portrait) display, with RGB666 interface, VSYNC, HSYNC, PIXCLK and DE signals. Looking for references on Linux kernel(on arch files of the QSB board and SABRE), and reading IMX53 User Manual, I figured out that some pins of the DI module(DI0_PINxx) can act as VSYNC, HSYNC and DE, but I don't realize where in the BSP each generic pin is assigned with a specific function. Can someone help me?
For the record: on mx53_loco.c file, those pads are configured as sync pins:
MX53_PAD_DI0_PIN15__IPU_DI0_PIN15, | |
MX53_PAD_DI0_PIN2__IPU_DI0_PIN2, | |
MX53_PAD_DI0_PIN3__IPU_DI0_PIN3, |
On QSB schematic, they are, respectively, DE, HSYNC and VSYNC. As these IPU pins are generics, I want to know where they are specifically configured.
Regards,
Ricardo Gurgel.
Solved! Go to Solution.
1. http://cache.freescale.com/files/32bit/doc/user_guide/MX53UG.pdf
Please read the Chapter 18 for LCD porting details.
2. Different Display Configurations on i.MX35 Linux PDK
http://cache.freescale.com/files/dsp/doc/app_note/AN3974.pdf
Although this is for i.MX35, the driving porting in Linux for i.MX53 is the same.
1. http://cache.freescale.com/files/32bit/doc/user_guide/MX53UG.pdf
Please read the Chapter 18 for LCD porting details.
2. Different Display Configurations on i.MX35 Linux PDK
http://cache.freescale.com/files/dsp/doc/app_note/AN3974.pdf
Although this is for i.MX35, the driving porting in Linux for i.MX53 is the same.