Configure UARTx_UCR3 / UARTx_UCR4 registers from device tree.

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Configure UARTx_UCR3 / UARTx_UCR4 registers from device tree.

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chrisrutherford
Contributor II

Hi,

With the IMX6 processor, where in the the device tree source do I configure the serial uarts to use inverted logic for TX and RX?

I can see from the programming reference that UARTx_UCR3  / UARTx_UCR4 registers can be configured to invert the UART pins by setting INVT and INVR bits.

Is there a 'high level' linux device tree way of doing this, or do I need to set the register directly?  In either case what is the best way to do this?

So far it seems I have to patch the driver and add a new device tree option.  Can fsl mainline this ?

DTS

&uart2 {

  pinctrl-names = "default";

  pinctrl-0 = <&pinctrl_uart2>;

  fsl,invert-logic;

  status = "okay";

};

imx serial.

    if (of_get_property(np, "fsl,invert-logic", NULL))

    {   

        sport->inv_rx = 1;

        sport->inv_tx = 1;

    }

.......

     if (sport->inv_rx == 1)

     {

        temp = readl(sport->port.membase + UCR4);

        temp |= UCR4_INVR;

        writel(temp, sport->port.membase + UCR4);

     }

     if (sport->inv_tx == 1)

     {

        temp = readl(sport->port.membase + UCR3);

        temp |= UCR3_INVT;

        writel(temp, sport->port.membase + UCR3);

     }

Best regards,

Christopher

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gusarambula
NXP TechSupport
NXP TechSupport

The correct way to implement this feature would be trough the Device Tree to make all the driver settings on the Device Tree and avoid conflicts by setting the register manually outside it.

You would indeed need to patch the driver and add this new feature to the Device Tree. Unfortunately since this feature is not used on Freescale’s BSPs it is not programmed to be added to mainline.

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