Hi,
We are evaluating dual display of i.MX8MQ. Currently I am trying MIPI DSI driven by LCDIF on our customized i.MX8MQ board but keep failing.
Do I need to do something else besides modification following fsl-imx8mq-evk-dual-display.dts and correct the panel timing?
The BSP is developed based on NXP 4.9.51 GA release.
I have already tried the following and they worked fine.
1. Single Display, HDMI driven by DCSS.
2. Single Display, MIPI driven by DCSS.
But I just can't make the MIPI driven by LCDIF output to the DSI panel.
I only got the backlight on, but nothing on the screen.
By measuring MIPI lanes using an oscilloscope, only MIPI clock is correct, but lack of data.
Please see the attachment for boot message with the kernel parameter, "drm.debug=0x1f" and the dts (Single display, MIPI DSI driven by LCDIF) is also attached.
The DSI panel is AUO G101UAN02.0 (1920x1200) using the panel-simple driver.
Panel timing has already validated with MIPI driven by DCSS.
The "max-res" property of lcdif changed to 1920x1200.
The device node for display (/dev/fb0) was created, but nothing happened after manipulating it. (for example: cat /dev/urandom > /dev/fb0)
I also tried to configure weston but no help. Below is the weston.ini:
# cat /etc/xdg/weston/weston.ini
[core]
idle-time=0
[screen-share]
command=@bindir@/weston --backend=rdp-backend.so --shell=fullscreen-shell.so --no-clients-resize
[output]
name=DSI-1
mode=current
Could anyone help for the next?
---------------------------- 2018/11/26 updated -----------------------------
Oops, I am really sorry that I don't know that modification my post will need to be approved again, and will lose the previous replies.
The current panel timing which can display normal when using MIPI driven by DCSS is shown below:
static const struct drm_display_mode auo_g101uan02_mode = {
.clock = 150000,
.hdisplay = 1920,
.hsync_start = 1920 + 60,
.hsync_end = 1920 + 60 + 18,
.htotal = 1920 + 60 + 18 + 60,
.vdisplay = 1200,
.vsync_start = 1200 + 4,
.vsync_end = 1200 + 4 + 4,
.vtotal = 1200 + 4 + 4 + 4,
.vrefresh = 60,
};
static const struct panel_desc_dsi auo_g101uan02 = {
.desc = {
.modes = &auo_g101uan02_mode,
.num_modes = 1,
.bpc = 6,
.size = {
.width = 217,
.height = 136,
},
},
.flags = MIPI_DSI_MODE_VIDEO |
MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_CLOCK_NON_CONTINUOUS,
.format = MIPI_DSI_FMT_RGB888,
.lanes = 4,
};
I have met the same problem, DCSS can show the screen but the LCDIF can‘t
So anyone could provide the solution ? thanks
We are facing the same issue, DCSS can show the screen but the LCDIF can‘t.
So anyone could provide the solution? thanks
请问您有解决该问题吗?我这边的应用环境为HDMI + mipi display 。如果您有解决的能不能加一下你,或者如果没解决的话,加一下微信或QQ一起解决。
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In the user guide, it 's written, that the LCDIF resolution can't reach yours...
13.1.1.1 Display Interface
Display Interface consists of the following:
• Enhanced LCD Interface (eLCDIF)
• Support 8-bit / 16-bit / 18-bit / 24-bit / 32-bit pixel depth
• Support DOTCLK mode for MIPI-DPI interface
• Support MPU mode for MIPI-DBI interface
• Support resolution up to 1920x1080p60 and 1800x1200p60
• Support one base layer and one graphics overlay with alpha blending
Hi, Carol,
Thank you for reminding me.
Although the current timing I am using is 1920x1200, I had already tried the 1920x1080.
When using MIPI driven by DCSS in 1920x1080, the display is abnormal but at least I could see MIPI outputs with expectation.
When using MIPI driven by LCDIF in 1920x1080, there is nothing on the panel.
I guess MIPI driven by LCDIF should output something on the panel even the resolution is wrong or is not supported but I am not pretty sure about this.
Thank you.
I find the explaination from NXP developper.
Hi, Carol,
Thanks for the information. It is really important.
I think what you posted is one of commit log from NXP kernel repository ?
I found nothing with the key word, "MLK-19700-2".
Could you kindly provide the source URL for that commit if it is allowed?
I found the description at https://source.puri.sm/Librem5/linux-emcraft/commit/0c2643a00b946c60b82d615bf312a8a59c032a88
Hi Yokai,
I had exactly the same problem. It was a problem with the MIPI flags. Try these flags:
dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_VIDEO_HSE;
Hi, Santiago,
Thanks for the reply.
The original panel timing and flag are okay when using MIPI driven by DCSS.
Of course I tried the flags you suggested but the result was the same.
Thank you.
Hi Yokai,
try also to change drm_display_mode flags to .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC.
imx8m-var-dart: Fixed LVDS panel clock and DSI definitions · varigit/linux-imx@836418f · GitHub
Hi, Santiago,
After applying the changes on the flags, it showed nothing no matter DCSS and LCDIF was used. :smileysad:
Those flags seem to depend on the panel. The original configuration at least works when using MIPI driven by DCSS.
Do you have any idea How I make sure the LCDIF is actually enabled and starts to drive the MIPI?