i.MX8MP USB PD realized


i.MX8MP USB PD realized


i.MX8MP USB PD realized

In the i.MX 8M Plus LPDDR4 EVK board there are two Type-C port design. For the port0 is used to power supply no usb function, for the port1 used for USB function but without PD function. But in customer’s design, customer only use one USB design on their board, how to make the one USB work with the PD and USB function, we need to make the hardware design and software modify. This article only give method to realized it and have tested and realized the port1 PD function.

1 Introduction of the USB interface on i.MX8MP

        There are two USB 3.0 TypeC controllers with integrated PHY interface on the i.MX8MP:

  • Backward compatibility with USB 2.0
  • Spread spectrum clock support



The USB on the i.MX8MP supports USB3.0 and is compatible with USB2.0 downward. We can see that the upper layer is the universal layer for USB 2.0 and USB 3.0 operations. This is a common interface, buffer management block, list processor, used to schedule and control the status register (CSR) function:

  • USB 2.0 physical layer and MAC layer
  • USB 3.0 physical layer, link layer and MAC layerb45499_1-1664552067341.png


Features of USB 3.0:

USB compliant version 3.0 (xHCI compatible)

  • Supports operation as a stand-alone USB host controller
  • USB dual role operation, configurable as host or device
  • Ultra high speed (5Gbit/s), high speed (480Mbit/s), full speed (12Mbit/s) and low speed (1.5Mbit/s) operation.
  • Support independent single port USB operation
  • Support for four programmable bidirectional USB endpoints
  • Support system memory interface with 40 bit addressing capability


2 Design of USB on Development Board

        The i.MX 8M Plus processor includes two USB 2.0/3.0 controllers and two integrated USB PHYs. USB supports both running as an independent USB host controller and dual role USB operation, and can be configured as a host or device. Therefore, the design of these two functions is implemented on the development board of i.MX8MP.



We can see that on the development board, one USB1 is used for the USB Type-C port and the other USB2 is used for the USB 3.0 host port. USB Type-C port 0 (J5) is only used for power supply. It does not support USB data transfer. It is the only power port, so the system must always be powered.


On the CPU side of the schematic diagram, we can also see that USB1 is the port for USB Type-C, and USB2 is the host for USB3.0. (During the design, it should be noted that USB1 should be used as the download port. ROM code only supports USB1 download.).



 USB1 is designed as USB Type-C:



USB2 USB3.0 Host design:



Power design of the USB Type-C port:



3 Only one USB interface is used in the design (compatible with both USB PD function and USB dual roles function)

        Two USB Type-C ports are used on our development board. One is used to power the board separately, and the other is used as the function of USB Type-C. However, due to the limited design cost and chip layout and space on the board, some customers will use a USB interface to realize the dual role function of power supply and USB. How to achieve this?

USB Device(Download mode):




USB Host mode(power+device Need the hub support PD function):




The specific implementation and design are as follows:

3.1 Hardware realize


To realize the USB Type-C support power supply function, PTN5110 (USB PD TCPC PHY IC) chip is required to realize Type-C data logic and power control and management. The selection of PTN5110 is critical and important.


PTN5110 is a single port USB PD (power supply) PHY IC that conforms to TCPC. It integrates Type-C configuration channel (CC) interface and USB PD physical layer functions into Type-C port manager (TCPM) that handles PD policy management. It complies with USB PD, Type-C and TCPC specifications.


The IC is mainly aimed at applications in system platforms (such as laptops, desktops, Chromebooks, tablets, flip notebooks, etc.). Other application cases may be feasible, depending on the application architecture, such as docking stations, displays, accessories, cable adapters, smartphones, etc.


It can support various Type-C applications: Sink, Source, Sink with accessory support or DRP. It executes Type-C CC simulation part (i.e. Rd/Rp/Ra detection, Rd/Rp indication) and PD Tx/Rx PHY and protocol state machine. PTN5110 supports TCPM in the system implementation of the following PD roles.


PTN5110 integrates VCONN load switch, programmable current limit, reverse leakage current blocking and over temperature protection (OTP). It is equipped with two enable control outputs to control the load switch/FET in the VBUS pull and/or sink path. It can also perform VBUS voltage monitoring/measurement, VBUS forced discharge and discharge discharge.


PTN5110 provides the main IO related functions for the main processor/TCPM, so that Type-C/PD interfaces can be easily controlled and managed through the TCPC interface.


PTN5110 supports a wide range of power input voltages, providing platform integrators with great flexibility. PTN5110 can run on VBUS to support specific system use cases that require no power operation.https://www.nxp.com/products/interfaces/usb-interfaces/usb-type-c/usb-pd-phy-and-cc-logic/usb-pd-tcp...


The design only use the USB1:



Here, it is required to weld R53 or R54. You can refer to this design completely.

2 Software modify

Modify the BPS of the software:

Take the newest released Linux 5.15.32_2.0.0 as example:

In the u-boot /board/freescale/imx8mp_evk/imx8mp_evk.c




It can be seen that the PD function of the port is turned off, so if you want to use USB1 for power supply, remove the following commands and turn on the PD function of USB1.

-   .disable_pd = true,”

Use the above action to enable Port1 PD function.

Kernel section modify:

Kernel section modify towards to PTN5110.

Type-C Configure channel (CC) interface


@@ -524,6 +524,7 @@ static int tcpci_vbus_force_discharge(struct tcpc_dev *tcpc, bool enable)

 static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)


       struct tcpci *tcpci = tcpc_to_tcpci(tcpc);

+      unsigned int reg;

       int ret;


       if (tcpci->data->set_vbus) {

@@ -533,16 +534,20 @@ static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)

                        return ret < 0 ? ret : 0;



+      ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, &reg);

+      if (ret < 0)

+              return ret;


       /* Disable both source and sink first before enabling anything */


-       if (!source) {

+      if (!source && (reg & TCPC_POWER_STATUS_SOURCING_VBUS)) {

                ret = regmap_write(tcpci->regmap, TCPC_COMMAND,


                if (ret < 0)

                        return ret;



-       if (!sink) {

+      if (!sink && (reg & TCPC_POWER_STATUS_SINKING_VBUS)) {

                ret = regmap_write(tcpci->regmap, TCPC_COMMAND,


                if (ret < 0)


Type-C port manager managed by PD (TCPM):

root/drivers/usb/typec/tcpm /tcpm.c

@@ -340,6 +340,7 @@ struct tcpm_port {


       bool vbus_vsafe0v;


+      bool vbus_keep;

       bool vbus_never_low;

       bool vbus_source;

       bool vbus_charge;

@@ -3662,7 +3663,8 @@ static void tcpm_reset_port(struct tcpm_port *port)

       port->rx_msgid = -1;


       port->tcpc->set_pd_rx(port->tcpc, false);

-       tcpm_init_vbus(port);     /* also disables charging */

+      if (!port->vbus_keep)

+              tcpm_init_vbus(port);  /* also disables charging */


       tcpm_set_current_limit(port, 0, 0);

       tcpm_set_polarity(port, TYPEC_POLARITY_CC1);

@@ -5834,6 +5836,9 @@ static void tcpm_init(struct tcpm_port *port)




+      port->vbus_present = port->tcpc->get_vbus(port->tcpc);

+      if (port->vbus_present)

+              port->vbus_keep = true;




@@ -5872,7 +5877,10 @@ static void tcpm_init(struct tcpm_port *port)

        * Some adapters need a clean slate at startup, and won't recover

        * otherwise. So do not try to be fancy and force a clean disconnect.


-       tcpm_set_state(port, PORT_RESET, 0);

+      if (!port->vbus_keep)

+              tcpm_set_state(port, PORT_RESET, 0);


+      port->vbus_keep = false;



 static int tcpm_port_type_set(struct typec_port *p, enum typec_port_type type)

Note: The software just needs to modify these two parts. You also need to mention to the proper the I2C port use, if not proper the driver of the PTN5110 can not driver.

4 Test

        In our i. MX8MP EVK development board show that R53 and R54 in the USB1 part of our development board are in DNP status, so VBUS_ IN is disconnected and no power comes in. Here, connect R53 or R54 with solder, so that VBUS_ IN, the power comes in again. After the power is connected. The board can be powered through USB1.

4.1 Download images to the emmc on the Board:

Power from the USB1, set the boot mode to serial download mode, then go to download images finished.

4.2 Boot up the board from the EMMC

Change the boot mode to boot up from EMMC,the board boot up, the log file is as following show:



It will stop at the TCPC for the section of PTN5110 driver.

By default, the PD function of port1 in the u-boot is turned off, so if you want to use USB1 for power supply, remove the following commands and turn on the PD function of USB1. “-   .disable_pd = true,”

After the PD function is turned on, the board can be started normally, but the whole part running to the kernel will be powered down, so the kernel part of PTN5110 still needs to be modified. After the patch modification of the above kernel part, the board can run normally.

        I also did the same experiment on the i.MX8MM EVK development board. The same phenomenon occurs when the kernel starts. Therefore, similar modifications to the above i. MX8MP can work normally.


In one word i.MX8MP and i.MX8M series can realize the role of using a USB for power supply and USB Dual. The hardware design refers to our development board, and we must use the logic chip PTN5110. For software, refer to the above code modification.


改訂 #:
‎09-30-2022 08:35 AM