SJA1105S No Communications

[mtcastle]

I am trying to bring up a custom board using a SJA1105s and I cannot get any traffic to go through the system.

Architecture:

• CPU: AT91SAMA5d36
• MAC Switch: SJA1105s
• Exterior PHY: Marvell 88E1512
• See connection diagram below
• The SJA is the only item connected to SPI0

Software Info:

• I am using the Linux4SAM kernel
• The kernel/device tree is made with buildroot
• Linux recognizes the SJA1105 and starts the driver

My Findings:

Linux believes it is sending data out of the system and TX packet counters will increment, there are no RX packets. However I am not seeing any information data out of the system. I have probed both the RX and TX lines on the PHY and can see RX data coming in (data into the switch) but no data on the TX line (Data leaving the switch). I do not have acsess to the RX/TX lines between CPU and SJA to see what is happening there.

The SJA1105 driver recognizes the PHY as a 88E1510, the same family but without SGMII. Looking at the Marvell driver it seems to indicate they are the same software wise.

The SJA1105 driver does notify when the Ethernet cord is removed/replugged, so it appears it is monitoring the PHY.

My Concerns/Problems:

edit:

The driver sets the host port to 1 which is connected to the CPU.

The SJA1105 driver sets the host port to port 0, all implementations seem to have port 0 be the port connected to the CPU. My design does not, is this an issue? Can it be solved with a change to the device tree or something in the driver? Does this require a board revision to debug?

The driver marks all untagged packets to be dropped. Does this mean I need to configure a VLAN system with tagging on the CPU? I attempted to follow the startup scripts used by LS1021A-TSN-RD. I did not notice any info about VLAN tagging.

Thank you in advance,

Let me know if you need anymore information from me.

The connections look like this:

        ┌──────────────────────────────┐
        │                              │
        │                              │
        │                              │
        │                              │
        │                              │
        │                  ┌───────────┴───────────────┐
        │                  │         SPI               │
  ┌─────▼─────────┐        │                           │
  │   SPI         │        │                           │
  │               │        │M                          │
  │              1◄────────┤A                          │
  │    SJA1105    │        │C                          │
  │               │        │        CPU                │
  │               │        │        ATSAMA5d36         │
  │               │        │                           │
  │       0       │        │                           │
  └───────┬───────┘        │                           │
          │                │        MDIO               │
          │                └──────────┬────────────────┘
          │                           │
          │                           │
          │                           │
┌─────────▼────────┐                  │
│       RGMII      │                  │
│                  │                  │
│   PHY            │                  │
│   88E1512       M│                  │
│                 D◄──────────────────┘
│                 I│
│                 O│
│                  │
└───────┬──────────┘
        │
        │
        │
        │
        │
        │
        │
        │
        │
        └► OUT

The device tree:

&macb0 {
	phy-mode = "rgmii-id";
	fsl,spi-cs-sck-delay = <1000>;
	fsl,spi-sck-cs-delay = <1000>;	
	status = "okay";
	fixed-link {
		speed = <1000>;
		full-duplex;
	};
	mdio{
		#address-cells = <1>;
		#size-cells = <0>;
		t1phy0: ethernet-phy@0{//may not need the driver specified
			compatible = "ethernet-phy-ieee802.3-c22", "marvell,88e1512";
			reg = <0x0>;
		};
	};
		
};

&spi0 {//Ethernet Switch
	pinctrl-names = "default", "cs";
    pinctrl-1 = <&pinctrl_spi0_cs>;
    cs-gpios = <&pioD 13 0>;
	status = "okay";
	
	
	//5 port switch
	sja1105@0 {
		compatible = "nxp,sja1105s";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x0>;
		spi-max-frequency = <44000000>;//44MHz
		fsl,spi-cs-sck-delay = <1000>;
		fsl,spi-sck-cs-delay = <1000>;	
		
		//specify for spi mode 1
		//spi-cpol;//cpol not needed
		spi-cpha;//shifted clock phase
		
		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {//Ethernet out 
				reg = <0>;
				label = "lan1";
				phy-handle = <&t1phy0>;
				phy-mode = "rgmii-id";
			};
			port@1 {//MAC
				label = "cpuMAC";
				phy-mode = "rgmii-id";
				reg = <1>;
				ethernet = <&macb0>;
				fixed-link {
					speed = <1000>;
					full-duplex;
				};
			};

			
		};
	};
};

[SebastianG]

Hello @mtcastle,

Could you please share with me the schematics of your board?

Regards,

Sebastian

[mtcastle]

Update:
The host port is being set to port 1(the CPU). I was incorrectly displaying that information.

[mtcastle]

Sent in a private message

[SebastianG]

Hello @mtcastle,

I would like to inform you that I'm working on your question, I will let you know as soon as I have an update.

Thank you so much for your patience

Regards,

Sebastian