This talk will review the driver, receiver, and common PCB characteristics and show how simulation with IBIS models are used to weigh the trade-offs for the DDR bus design. We will also review the high-speed signal channel and its characteristics and illustrate how the TX and RX circuits in general are used to offset signal losses, and discuss key characteristics of the channels that are needed to allow these TX and RX circuits to work effectively, such as minimizing return loss.
