Hi to all.
In T1040RM Rev.1 uses PLL1 (table 31-3) for PCIe. But in T1040RDB Rev.0 uses SD_Refclk2_P/N for PCIE and MPEX that connect to PLL2( figure2-2).
I think that in T1040RDB make mistake for serdes clock.
I dont know, use which PLL for PCIe and MPEX.
Both documents are correct.
Please consider two things:
1) according to the Table 31-3 the PCIe controllers use PLL1 and the SerDes Reference clock 1 could be either 100 or 125 MHz.
125 Mhz clock is used on the RDB board as SD1_REF_CLK1.
2) Reference clock provided by a PCIe slot/connector must always be 100 MHz and this is true for the RDB board.