PCIe Link Retrain on T2080

[valkir]

Hello

We do have problem with one PCIe device connected to our T2080 board as we the PCIe Link seems not to be very stable. Reset of the T2080 helps to establish a link. 

Is there any recommended procedure to initiate PCIe Link Retrain from the SW to avoid the reset? There is a bit RL in the PCIE Control Register with offset 80h (Para 20.5.4.7 of the RM), but no recommendation how to perform Retrain (timing and exact sequence)

Or to perform the complete Reset for the given PCIe Controller?

In the past I was able to do this for P3041 processors, but the new Register Map for T2080 is quite different.

Thank you!

Valery

[yipingwang]

Link Re-train:
Just set the Link_Control_Register[RL] bit at offset 0x80. It is reserved for EP devices. Setting this bit initiates link retraining in RC mode by directing the Physical Layer LTSSM to the Recovery state; reads of this bit always return 0. It is not recommended to modify other fields of this register.