Verification of S32K internal FUSA mechanism

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Verification of S32K internal FUSA mechanism

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FXY
Contributor II

Hi team, 

Can you recommend some good methods to quickly verify the effectiveness of the following #S32K3 security mechanisms?

Security mechanisms for SPFM:

SM4.FLASH.PGM_ERS_CONTENT

 

Security mechanisms for LPFM:

SM2.FLASH.SCHECK
SM2.SWT.SCHECK
SM2.XRDC.SCHECK
SM2.CMU.SCHECK
SM2.CRC.SCHECK
SM2.ECC.SCHECK

 

thanks

 

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Yashwant_Singh
NXP Employee
NXP Employee

Hi Kevin!

We check the software safety mechanism for systematic faults only as per ISO26262-6. We are not aware of any case where the software logic will have random faults. If the logic starts to fail, it could be because it has not been verified for all corner cases or because the hardware on which it is running has random failures. Let us know if you think otherwise.

Talking about the SM4 mechanism, it’s the responsibility of the system integrator to implement this software safety mechanism and check for systematic faults. The SM2  Mechanisms mentioned above check the hardware safety mechanisms (check the checker) .As far as the SCHECKS are considered they are a part of the Software Safety Pack (SAF) offering from NXP and are compliant to ISO26262 and hence free from systematic faults(we can provide assessment report for SAF if needed). If the customer choses not to use our Software Safety Pack then the implementation of the SCHECKS again become the responsibility of the System Integrator and they must ensure to avoid systematic faults in the software.

Thanks!

-Yashwant

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