S32K1xx - SRAM ECC failure reporting validation

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S32K1xx - SRAM ECC failure reporting validation

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nsiegel
Contributor IV

Hi, 

Our customer has the following question regarding SRAM ECC faults:

SM_119 is described as this: "The Flash memory ECC failure reporting path should be checked to validate if detected ECC faults are correctly reported."

There is no such SM for the SRAM ECC to validate if SRAM ECC faults are correctly reported.  Is that a missing one, or is there no need validate such a thing for SRAM ECC?

Kind regards,

Norm

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Yashwant_Singh
NXP Employee
NXP Employee

Hello Norm,

The S32K1xx Safety Concept relies on the safety mechanism "EIM executed within FTTI" (SM_111) to cover the single point faults of the SRAM ECC logic and error injection implicitly checks the ECC reporting path for SRAM as well. See section 5.6.13 of the safety manual:

Yashwant_Singh_0-1743152521397.png

 

Thanks!
-Yashwant

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