I'm trying to use 2 SPI peripherals one for transmitting and the other for receiving. both are configured as Master only.
I'm interfacing MC33664 with S32k144 where SPI 0 is for receiving converted TPL signal as SPI data and SPI_1 is for transmitting data for TPL conversion.
whenever I read the internal buffer passed in code it gives no recorded data as the logic analyzer shows data input (this is a loopback condition where transmitted data needs to be received the same on the other end but at last I'm receiving the wrong data but not able to store in internal buffers.
Here's the code:
#include "sdk_project_config.h"
#include <stdint.h>
#include <stdbool.h>
volatile int exit_code = 0;
/* User includes */
#define PORT_B PTB
#define PORT_D PTD
#define TPL1_EN 0
#define TPL1_INT 1
#define TPL2_EN 4
#define TPL2_INT 12
#define BUFFER_SIZE 1
#define TIMEOUT 10
uint8_t masterDataSend_1 = 0xAA;
uint8_t masterDataReceive_1[10];
uint8_t empty_buffer;
uint8_t DataReceive_1;
void TimeDelay(volatile int32_t seconds) {
while (seconds > 0) {
seconds--;
}
}
int main(void)
{
status_t error;
/* Initialize and configure clocks
* - see clock manager component for details
*/
error = CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT, g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT);
error = CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_AGREEMENT);
/* Initialize pins
* - See PinSettings component for more info
*/
error = PINS_DRV_Init(NUM_OF_CONFIGURED_PINS0, g_pin_mux_InitConfigArr0);
/*TPL1 EN PIN*/
PINS_DRV_SetPins(PORT_B, 1 << TPL1_EN);
/*TPL1 Verification Pulse*/
PINS_DRV_ClearPins(PORT_B, 1 << TPL1_INT);
TimeDelay(400);
PINS_DRV_SetPins(PORT_B, 1 << TPL1_INT);
/*TPL2 EN PIN*/
PINS_DRV_SetPins(PORT_D, 1 << TPL2_EN);
/*TPL2 Verification Pulse*/
PINS_DRV_ClearPins(PORT_B, 1 << TPL2_INT);
TimeDelay(400);
PINS_DRV_SetPins(PORT_B, 1 << TPL2_INT);
/* Initialize LPSPI0 (Receive TPL1)*/
LPSPI_DRV_MasterInit(INST_LPSPI_0, &lpspi_0State, &TPL1_RX);
/* Initialize LPSPI1 (Transmit TPL1-2)*/
LPSPI_DRV_MasterInit(INST_LPSPI_1, &lpspi_1State, &TPL_1_2_TX);
/* Initialize LPSPI2 (Receive TPL2)*/
LPSPI_DRV_MasterInit(INST_LPSPI_2, &lpspi_2State, &TPL2_RX);
/*Delay introduced between transfers, PCS-SCK(2us) and SCK_PCS (2us)*/
LPSPI_DRV_MasterSetDelay(INST_LPSPI_1, 10, 15, 15);
LPSPI_DRV_SetPcs(INST_LPSPI_1, 2, 0);
for(;;)
{
LPSPI_DRV_MasterTransferBlocking(INST_LPSPI_1, &masterDataSend_1, NULL, BUFFER_SIZE, 1000);
// TimeDelay(480000);
LPSPI_DRV_MasterTransferBlocking(INST_LPSPI_0, NULL , &DataReceive_1, BUFFER_SIZE, 1000);
// TimeDelay(480000);
if(exit_code != 0)
{
break;
}
}
return exit_code;
}
/* END main */
/*!
** @}
*/