SACKERR after executing WFI in S32K146

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SACKERR after executing WFI in S32K146

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priyakrish
Contributor I

Hi,

I am evaluating the MCU RUN->VLPS and VLPS->RUN mode transition in S32K146 in my application.

After few minutes of CAN inactivity, the process of transition to sleep should be started. Hence before entering LPS, CAN RX pin is made as GPIO and interrupt is enabled for that GPIO pin.

Please find code below.

/* Set PTE4 as input pin */
FBL_GPIOE_PDDR &= ~(1 << 4);

/* Set PTE4 as GPIO */
FBL_PORTE_PCR(4u) &= (0xFFFFF8FF);
FBL_PORTE_PCR(4u) |= (1u << 8u);

/* Clear the IRQC bit in PCR register */
FBL_PORTE_PCR(4u) &= (0xFFF0FFFF);
/* Set IRQC as 1010 - ISF flag and Interrupt on falling-edge in PCR register */
FBL_PORTE_PCR(4u) |= (10u << 16u);

Mcu_SetMode(1);

With the above code, after entering WFI instruction in Mcu_SetMode, it comes out immediately due to SACERR.

  • If only Mcu_SetMode(1); is called, ECU is entering the LPS mode.
  • If the code for GPIO and interrupt is added before Mcu_SetMode(1);, it is going to SACKERR.

There is no GPIO edge transition in that pin during sleep transition.

Please provide your input what could be reason why GPIO is blocking entering Sleep.

 

 

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3 Replies

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello,

Can you read the PORTE_PCR[4] register and the NVIC registers just before WFI instruction?

Have you tried debugging the exception?

https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447

 

Thanks,

BR, Daniel

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962 Views
priyakrish
Contributor I

Yes. FlexCAN is disabled before entering VLPS.

After commenting the below two lines, it entered VLPS without any issues.

/* Set PTE4 as GPIO */
FBL_PORTE_PCR(4u) &= (0xFFFFF8FF);
FBL_PORTE_PCR(4u) |= (1u << 8u);

During wakeup from VLPS, ISF flag sets in PCR and ISFR register. But ISR doesn't hit and exception happens.

Below line is added to enable the PORTE interrupt and Interrupt handler is added in the Vector table.

NVIC_ISER_ADDR(NVIC_IRQ_NO_ISER_OFFSET(63)) |= 1 << NVIC_IRQ_NO_ISER_BIT_OFFSET(63);

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

There is no need to reconfigure the pin to GPIO as the Active edge interrupt is a function of the PORT module not GPIO and the interrupt can be used with every digital function of the pin including FlexCAN RX.

But the FlexCAN module must be disabled before the MCU enters VLPS.

Do you disable the FlexCAN?

 

Thanks,

BR, Daniel

 

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